From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E9EEA0613 for ; Wed, 25 Sep 2019 02:55:29 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 44A2C2BF5; Wed, 25 Sep 2019 02:55:28 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 3DE902BF2 for ; Wed, 25 Sep 2019 02:55:26 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Sep 2019 17:55:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,546,1559545200"; d="scan'208";a="218823400" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga002.fm.intel.com with ESMTP; 24 Sep 2019 17:55:24 -0700 Received: from fmsmsx154.amr.corp.intel.com (10.18.116.70) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 24 Sep 2019 17:55:24 -0700 Received: from cdsmsx103.ccr.corp.intel.com (172.17.3.37) by FMSMSX154.amr.corp.intel.com (10.18.116.70) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 24 Sep 2019 17:55:23 -0700 Received: from cdsmsx104.ccr.corp.intel.com ([169.254.4.171]) by CDSMSX103.ccr.corp.intel.com ([169.254.5.145]) with mapi id 14.03.0439.000; Wed, 25 Sep 2019 08:55:20 +0800 From: "Zhang, Tianfei" To: "Ye, Xiaolong" , "Pei, Andy" CC: "dev@dpdk.org" , "Xu, Rosen" , "Zhang, Qi Z" , "Lomartire, David" , "Yigit, Ferruh" Thread-Topic: [PATCH v6 04/17] raw/ifpga/base: add SEU error support Thread-Index: AQHVbssUVQxnhPznFEKtKarL9wJH1qc6iOMAgAERJhA= Date: Wed, 25 Sep 2019 00:55:19 +0000 Message-ID: References: <1568881185-89233-2-git-send-email-andy.pei@intel.com> <1568883774-92149-1-git-send-email-andy.pei@intel.com> <1568883774-92149-5-git-send-email-andy.pei@intel.com> <20190924163702.GA73513@intel.com> In-Reply-To: <20190924163702.GA73513@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.17.6.105] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v6 04/17] raw/ifpga/base: add SEU error support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Ye, Xiaolong > Sent: Wednesday, September 25, 2019 12:37 AM > To: Pei, Andy > Cc: dev@dpdk.org; Xu, Rosen ; Zhang, Tianfei > ; Zhang, Qi Z ; Lomartire, > David ; Yigit, Ferruh > Subject: Re: [PATCH v6 04/17] raw/ifpga/base: add SEU error support >=20 > On 09/19, Andy Pei wrote: > >From: Tianfei zhang > > > >This patch exposes SEU error information to application then > >application could compare this information (128bit) with its own SMH > >file to know if this SEU is a fatal error or not. > > > >Signed-off-by: Tianfei zhang > >Signed-off-by: Andy Pei > >--- > > drivers/raw/ifpga/base/ifpga_defines.h | 5 +++- > > drivers/raw/ifpga/base/ifpga_fme_error.c | 43 > ++++++++++++++++++++++++++++++ > > drivers/raw/ifpga/base/opae_ifpga_hw_api.h | 2 ++ > > 3 files changed, 49 insertions(+), 1 deletion(-) > > > >diff --git a/drivers/raw/ifpga/base/ifpga_defines.h > >b/drivers/raw/ifpga/base/ifpga_defines.h > >index 4216128..b450cb1 100644 > >--- a/drivers/raw/ifpga/base/ifpga_defines.h > >+++ b/drivers/raw/ifpga/base/ifpga_defines.h > >@@ -1149,7 +1149,8 @@ struct feature_fme_error_capability { > > u8 support_intr:1; > > /* MSI-X vector table entry number */ > > u16 intr_vector_num:12; > >- u64 rsvd:51; /* Reserved */ > >+ u64 rsvd:50; /* Reserved */ > >+ u64 seu_support:1; > > }; > > }; > > }; > >@@ -1171,6 +1172,8 @@ struct feature_fme_err { > > struct feature_fme_ras_catfaterror ras_catfaterr; > > struct feature_fme_ras_error_inj ras_error_inj; > > struct feature_fme_error_capability fme_err_capability; > >+ u64 seu_emr_l; > >+ u64 seu_emr_h; > > }; > > > > /* FME Partial Reconfiguration Control */ diff --git > >a/drivers/raw/ifpga/base/ifpga_fme_error.c > >b/drivers/raw/ifpga/base/ifpga_fme_error.c > >index a6d3dab..c9bac15 100644 > >--- a/drivers/raw/ifpga/base/ifpga_fme_error.c > >+++ b/drivers/raw/ifpga/base/ifpga_fme_error.c > >@@ -257,6 +257,45 @@ static void fme_global_error_uinit(struct > ifpga_feature *feature) > > UNUSED(feature); > > } > > > >+static int fme_err_check_seu(struct feature_fme_err *fme_err) { > >+ struct feature_fme_error_capability error_cap; > >+ > >+ error_cap.csr =3D readq(&fme_err->fme_err_capability); > >+ > >+ return error_cap.seu_support ? 1 : 0; } > >+ > >+static int fme_err_get_seu_emr_low(struct ifpga_fme_hw *fme, > >+ u64 *val) > >+{ > >+ struct feature_fme_err *fme_err > >+ =3D get_fme_feature_ioaddr_by_index(fme, > >+ FME_FEATURE_ID_GLOBAL_ERR); > >+ > >+ if (!fme_err_check_seu(fme_err)) > >+ return -ENODEV; > >+ > >+ *val =3D readq(&fme_err->seu_emr_l); > >+ > >+ return 0; > >+} > >+ > >+static int fme_err_get_seu_emr_high(struct ifpga_fme_hw *fme, > >+ u64 *val) > >+{ > >+ struct feature_fme_err *fme_err > >+ =3D get_fme_feature_ioaddr_by_index(fme, > >+ FME_FEATURE_ID_GLOBAL_ERR); > >+ > >+ if (!fme_err_check_seu(fme_err)) > >+ return -ENODEV; > >+ > >+ *val =3D readq(&fme_err->seu_emr_h); > >+ > >+ return 0; > >+} >=20 > Above 2 functions can be combined to reduce duplication. >=20 Thanks your suggestion, I will fix it in next version.