From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 7666C2B95 for ; Thu, 24 Mar 2016 09:09:33 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 24 Mar 2016 01:09:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,384,1455004800"; d="scan'208";a="940520112" Received: from irsmsx106.ger.corp.intel.com ([163.33.3.31]) by orsmga002.jf.intel.com with ESMTP; 24 Mar 2016 01:09:32 -0700 Received: from irsmsx101.ger.corp.intel.com ([169.254.1.157]) by IRSMSX106.ger.corp.intel.com ([169.254.8.172]) with mapi id 14.03.0248.002; Thu, 24 Mar 2016 08:09:30 +0000 From: "Fischetti, Antonio" To: "De Lara Guarch, Pablo" , "dev@dpdk.org" CC: "Lu, Wenzhuo" , "De Lara Guarch, Pablo" Thread-Topic: [dpdk-dev] [PATCH v2] ixgbe: add check for tx queue number Thread-Index: AQHRhRjN4uB6cX9800mWdLo0lMdWvp9oNzog Date: Thu, 24 Mar 2016 08:09:30 +0000 Message-ID: References: <1458634121-1808-1-git-send-email-wenzhuo.lu@intel.com> <1458746929-87915-1-git-send-email-pablo.de.lara.guarch@intel.com> In-Reply-To: <1458746929-87915-1-git-send-email-pablo.de.lara.guarch@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiY2Q5NmM3ZGQtOTljOC00YmQ2LWI2Y2ItZGRkOWQyMWQ4NWUxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IjVkK1h0dzgydElEKzczQksyaHlcL3RZVGRzMSt3Q010QjliYkxnSFwvZ0htYz0ifQ== x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] ixgbe: add check for tx queue number X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Mar 2016 08:09:34 -0000 Hi, I tested this patch with OVS+DPDK on a 72 lcores board with an=20 Intel 82599ES 10 Gb NIC. It works fine. Now when I call 'rte_eth_dev_info_get()' it returns correctly the number of available Tx queues for the default mode, i.e. 64 when no VT and no DCB is set. Also, if I attempt to request more than the available queues via 'rte_eth_dev_configure()' it correctly returns -EINVAL error. I checked it works with both DPDK v2.2.0 and the latest master branch. Without this patch there was a misbehavior: when OVS queried for the number of available Tx queues, 128 was returned. As a consequence OVS was requesting 73 Tx queues, even though just 64 were really=20 available. No error was returned. Of course any transmission was failing when OVS attempted to use queues with ID >=3D 64. Regards, Antonio > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Pablo de Lara > Sent: Wednesday, March 23, 2016 3:29 PM > To: dev@dpdk.org > Cc: Lu, Wenzhuo ; De Lara Guarch, Pablo > > Subject: [dpdk-dev] [PATCH v2] ixgbe: add check for tx queue number >=20 > IXGBE supports 128 TX queues. However, the full 128 queues > are only available in VT and DCB mode. > In normal default "none" mode (VT/DCB off) the maximum number > of available queues is only 64. > IXGBE doesn't check the mode when reporting the available > number of queues. If a queue larger than 64 is used in default mode, > the TX packets will be dropped silently. >=20 > This change adds a check to forbid using a queue number larger than 64 > during device configuration (in default mode), so that the problem is > reported as early as possible. > It also changes the order of where the dev_conf parameters are copied > into the dev structure so that the correct maximum number of queues > is reported for the correct mode. >=20 > Signed-off-by: Wenzhuo Lu > Signed-off-by: Pablo de Lara > --- >=20 > Changes in v2: >=20 > - Reorder memcpy of device configuration in rte_eth_dev_configure(), > so function gets the correct maximum number of queues > (depending on the operation mode), before checking the > requested number of queues. > - Renamed new macro > - Reworded/wrapped commit message >=20 > drivers/net/ixgbe/ixgbe_ethdev.c | 17 ++++++++++++++++- > drivers/net/ixgbe/ixgbe_ethdev.h | 1 + > lib/librte_ether/rte_ethdev.c | 6 +++--- > 3 files changed, 20 insertions(+), 4 deletions(-) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_e= thdev.c > index d4d883a..c799b47 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -1862,7 +1862,7 @@ ixgbe_check_mq_mode(struct rte_eth_dev *dev) > { > struct rte_eth_conf *dev_conf =3D &dev->data->dev_conf; > uint16_t nb_rx_q =3D dev->data->nb_rx_queues; > - uint16_t nb_tx_q =3D dev->data->nb_rx_queues; > + uint16_t nb_tx_q =3D dev->data->nb_tx_queues; >=20 > if (RTE_ETH_DEV_SRIOV(dev).active !=3D 0) { > /* check multi-queue mode */ > @@ -2002,6 +2002,16 @@ ixgbe_check_mq_mode(struct rte_eth_dev *dev) > return -EINVAL; > } > } > + > + if (dev_conf->txmode.mq_mode =3D=3D ETH_MQ_TX_NONE) { > + if (nb_tx_q > IXGBE_NONE_MODE_TX_NB_QUEUES) { > + PMD_INIT_LOG(ERR, > + "Neither VT nor DCB are enabled, " > + "nb_tx_q > %d.", > + > IXGBE_NONE_MODE_TX_NB_QUEUES); > + return -EINVAL; > + } > + } > } > return 0; > } > @@ -2856,9 +2866,14 @@ static void > ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info > *dev_info) > { > struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > + struct rte_eth_conf *dev_conf =3D &dev->data->dev_conf; >=20 > dev_info->max_rx_queues =3D (uint16_t)hw->mac.max_rx_queues; > dev_info->max_tx_queues =3D (uint16_t)hw->mac.max_tx_queues; > + if (RTE_ETH_DEV_SRIOV(dev).active =3D=3D 0) { > + if (dev_conf->txmode.mq_mode =3D=3D ETH_MQ_TX_NONE) > + dev_info->max_tx_queues =3D > IXGBE_NONE_MODE_TX_NB_QUEUES; > + } > dev_info->min_rx_bufsize =3D 1024; /* cf BSIZEPACKET in SRRCTL register > */ > dev_info->max_rx_pktlen =3D 15872; /* includes CRC, cf MAXFRS register > */ > dev_info->max_mac_addrs =3D hw->mac.num_rar_entries; > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h > b/drivers/net/ixgbe/ixgbe_ethdev.h > index 5c3aa16..691c62f 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.h > +++ b/drivers/net/ixgbe/ixgbe_ethdev.h > @@ -61,6 +61,7 @@ > #define IXGBE_MAX_RX_QUEUE_NUM 128 > #define IXGBE_VMDQ_DCB_NB_QUEUES IXGBE_MAX_RX_QUEUE_NUM > #define IXGBE_DCB_NB_QUEUES IXGBE_MAX_RX_QUEUE_NUM > +#define IXGBE_NONE_MODE_TX_NB_QUEUES 64 >=20 > #ifndef NBBY > #define NBBY 8 /* number of bits in a byte */ > diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.= c > index 8721a6b..b941b0d 100644 > --- a/lib/librte_ether/rte_ethdev.c > +++ b/lib/librte_ether/rte_ethdev.c > @@ -901,6 +901,9 @@ rte_eth_dev_configure(uint8_t port_id, uint16_t > nb_rx_q, uint16_t nb_tx_q, > return -EBUSY; > } >=20 > + /* Copy the dev_conf parameter into the dev structure */ > + memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data- > >dev_conf)); > + > /* > * Check that the numbers of RX and TX queues are not greater > * than the maximum number of RX and TX queues supported by the > @@ -925,9 +928,6 @@ rte_eth_dev_configure(uint8_t port_id, uint16_t > nb_rx_q, uint16_t nb_tx_q, > return -EINVAL; > } >=20 > - /* Copy the dev_conf parameter into the dev structure */ > - memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data- > >dev_conf)); > - > /* > * If link state interrupt is enabled, check that the > * device supports it. > -- > 2.5.5