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Thu, 23 Jul 2020 01:57:03 +0000 Received: from BN6PR11MB0017.namprd11.prod.outlook.com ([fe80::c8eb:f4c9:5b58:3120]) by BN6PR11MB0017.namprd11.prod.outlook.com ([fe80::c8eb:f4c9:5b58:3120%6]) with mapi id 15.20.3195.023; Thu, 23 Jul 2020 01:57:03 +0000 From: "Yang, Qiming" To: "Wang, ShougangX" , "dev@dpdk.org" CC: "Xing, Beilei" , "Guo, Jia" , "Wang, ShougangX" , "stable@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v3] net/i40e: fix incorrect hash look up table Thread-Index: AQHWYALZy2sRjXuV50ilSElK4Ihay6kUaNbg Date: Thu, 23 Jul 2020 01:57:03 +0000 Message-ID: References: <20200715063515.9262-1-shougangx.wang@intel.com> <20200722081543.52396-1-shougangx.wang@intel.com> In-Reply-To: <20200722081543.52396-1-shougangx.wang@intel.com> Accept-Language: en-US, zh-CN Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.102.204.45] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 33524859-13d4-41a1-4900-08d82eabb239 x-ms-traffictypediagnostic: BN6PR11MB1313: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN6PR11MB0017.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 33524859-13d4-41a1-4900-08d82eabb239 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Jul 2020 01:57:03.5380 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: cWpAdmWxNz45xSyeBUYm4dOOkTtRf1cbbH62ywf4HyOgUIMii1NzyFZQYy7tjCMrdQguh+ggCg5n5mx/Rlf/dw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1313 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v3] net/i40e: fix incorrect hash look up table X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" I don't understand why you add new function and new function mostly do the = same thing. Why don't add fix in original code. > -----Original Message----- > From: dev On Behalf Of Shougang Wang > Sent: Wednesday, July 22, 2020 16:16 > To: dev@dpdk.org > Cc: Xing, Beilei ; Guo, Jia ; W= ang, > ShougangX ; stable@dpdk.org > Subject: [dpdk-dev] [PATCH v3] net/i40e: fix incorrect hash look up table >=20 > The hash look up table (LUT) is managed by global register but it is not > initialized when RSS is disabled. Once user wants to enable RSS during > runtime, the LUT will not be initialized. > This patch fixes the issue by initializing the LUT whether RSS enabled or= not. >=20 > Fixes: feaae285b342 ("net/i40e: support hash configuration in RSS flow") > Cc: stable@dpdk.org >=20 > Signed-off-by: Shougang Wang > --- > v3: > -Updated the time of initializing the look up table > --- > drivers/net/i40e/i40e_ethdev.c | 85 ++++++++++++++++++++-------------- > 1 file changed, 49 insertions(+), 36 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 05d5f2861..e35590d96 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -8984,42 +8984,7 @@ i40e_pf_calc_configured_queues_num(struct > i40e_pf *pf) static int i40e_pf_config_rss(struct i40e_pf *pf) { > - struct i40e_hw *hw =3D I40E_PF_TO_HW(pf); > struct rte_eth_rss_conf rss_conf; > - uint32_t i, lut =3D 0; > - uint16_t j, num; > - > - /* > - * If both VMDQ and RSS enabled, not all of PF queues are > configured. > - * It's necessary to calculate the actual PF queues that are configured= . > - */ > - if (pf->dev_data->dev_conf.rxmode.mq_mode & > ETH_MQ_RX_VMDQ_FLAG) > - num =3D i40e_pf_calc_configured_queues_num(pf); > - else > - num =3D pf->dev_data->nb_rx_queues; > - > - num =3D RTE_MIN(num, I40E_MAX_Q_PER_TC); > - PMD_INIT_LOG(INFO, "Max of contiguous %u PF queues are > configured", > - num); > - > - if (num =3D=3D 0) { > - PMD_INIT_LOG(ERR, > - "No PF queues are configured to enable RSS for port > %u", > - pf->dev_data->port_id); > - return -ENOTSUP; > - } > - > - if (pf->adapter->rss_reta_updated =3D=3D 0) { > - for (i =3D 0, j =3D 0; i < hw->func_caps.rss_table_size; i++, j++) { > - if (j =3D=3D num) > - j =3D 0; > - lut =3D (lut << 8) | (j & ((0x1 << > - hw->func_caps.rss_table_entry_width) - 1)); > - if ((i & 3) =3D=3D 3) > - I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> > 2), > - rte_bswap32(lut)); > - } > - } >=20 > rss_conf =3D pf->dev_data->dev_conf.rx_adv_conf.rss_conf; > if ((rss_conf.rss_hf & pf->adapter->flow_types_mask) =3D=3D 0) { @@ - > 9195,12 +9160,60 @@ i40e_tunnel_filter_handle(struct rte_eth_dev *dev, > return ret; > } >=20 > +/* Initialize the hash look up table */ static int > +i40e_pf_init_rss_lut(struct i40e_pf *pf) { > + struct i40e_hw *hw =3D I40E_PF_TO_HW(pf); > + uint32_t lut =3D 0; > + uint16_t j, num; > + uint32_t i; > + > + /* If both VMDQ and RSS enabled, not all of PF queues are > configured. > + * It's necessary to calculate the actual PF queues that are configured= . > + */ > + if (pf->dev_data->dev_conf.rxmode.mq_mode & > ETH_MQ_RX_VMDQ_FLAG) > + num =3D i40e_pf_calc_configured_queues_num(pf); > + else > + num =3D pf->dev_data->nb_rx_queues; > + > + num =3D RTE_MIN(num, I40E_MAX_Q_PER_TC); > + PMD_INIT_LOG(INFO, "Max of contiguous %u PF queues are > configured", > + num); > + > + if (num =3D=3D 0) { > + PMD_INIT_LOG(ERR, > + "No PF queues are configured to enable RSS for port > %u", > + pf->dev_data->port_id); > + return -ENOTSUP; > + } > + > + if (pf->adapter->rss_reta_updated =3D=3D 0) { > + for (i =3D 0, j =3D 0; i < hw->func_caps.rss_table_size; i++, j++) { > + if (j =3D=3D num) > + j =3D 0; > + lut =3D (lut << 8) | (j & ((0x1 << > + hw->func_caps.rss_table_entry_width) - 1)); > + if ((i & 3) =3D=3D 3) > + I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> > 2), > + rte_bswap32(lut)); > + } > + } > + > + return 0; > +} > + > static int > i40e_pf_config_mq_rx(struct i40e_pf *pf) { > - int ret =3D 0; > + int ret; > enum rte_eth_rx_mq_mode mq_mode =3D pf->dev_data- > >dev_conf.rxmode.mq_mode; >=20 > + /* Initialize hash look up table */ > + ret =3D i40e_pf_init_rss_lut(pf); > + if (ret) > + return ret; > + > /* RSS setup */ > if (mq_mode & ETH_MQ_RX_RSS_FLAG) > ret =3D i40e_pf_config_rss(pf); > -- > 2.17.1