* [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling
@ 2020-03-13 18:07 Arek Kusztal
2020-03-13 18:07 ` [dpdk-dev] [PATCH 2/2] test: add crypto aes-gcm J0 test case Arek Kusztal
2020-03-16 16:25 ` [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling Trahe, Fiona
0 siblings, 2 replies; 6+ messages in thread
From: Arek Kusztal @ 2020-03-13 18:07 UTC (permalink / raw)
To: dev; +Cc: akhil.goyal, fiona.trahe, Arek Kusztal
This patch adds J0 capability to Intel QuickAssist Technology driver
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
drivers/crypto/qat/qat_sym_capabilities.h | 8 ++++----
drivers/crypto/qat/qat_sym_session.c | 11 ++++++++---
drivers/crypto/qat/qat_sym_session.h | 5 +++++
3 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/qat/qat_sym_capabilities.h b/drivers/crypto/qat/qat_sym_capabilities.h
index 028a56c..36be80a 100644
--- a/drivers/crypto/qat/qat_sym_capabilities.h
+++ b/drivers/crypto/qat/qat_sym_capabilities.h
@@ -227,9 +227,9 @@
.increment = 1 \
}, \
.iv_size = { \
- .min = 12, \
+ .min = 0, \
.max = 12, \
- .increment = 0 \
+ .increment = 12 \
}, \
}, } \
}, } \
@@ -252,9 +252,9 @@
.increment = 4 \
}, \
.iv_size = { \
- .min = 12, \
+ .min = 0, \
.max = 12, \
- .increment = 0 \
+ .increment = 12 \
} \
}, } \
}, } \
diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c
index 4359f2f..b7ca846 100644
--- a/drivers/crypto/qat/qat_sym_session.c
+++ b/drivers/crypto/qat/qat_sym_session.c
@@ -653,6 +653,9 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,
uint8_t key_length = auth_xform->key.length;
session->aes_cmac = 0;
+ session->auth_iv.offset = auth_xform->iv.offset;
+ session->auth_iv.length = auth_xform->iv.length;
+
switch (auth_xform->algo) {
case RTE_CRYPTO_AUTH_SHA1_HMAC:
session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
@@ -684,6 +687,8 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,
}
session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
+ if (session->auth_iv.length == 0)
+ session->auth_iv.length = AES_GCM_J0_LEN;
break;
case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
@@ -723,9 +728,6 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,
return -EINVAL;
}
- session->auth_iv.offset = auth_xform->iv.offset;
- session->auth_iv.length = auth_xform->iv.length;
-
if (auth_xform->algo == RTE_CRYPTO_AUTH_AES_GMAC) {
if (auth_xform->op == RTE_CRYPTO_AUTH_OP_GENERATE) {
session->qat_cmd = ICP_QAT_FW_LA_CMD_CIPHER_HASH;
@@ -808,6 +810,9 @@ qat_sym_session_configure_aead(struct rte_cryptodev *dev,
}
session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
+ if (session->cipher_iv.length == 0)
+ session->cipher_iv.length = AES_GCM_J0_LEN;
+
break;
case RTE_CRYPTO_AEAD_AES_CCM:
if (qat_sym_validate_aes_key(aead_xform->key.length,
diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h
index 98985d6..5a01c81 100644
--- a/drivers/crypto/qat/qat_sym_session.h
+++ b/drivers/crypto/qat/qat_sym_session.h
@@ -20,6 +20,11 @@
#define KASUMI_F8_KEY_MODIFIER_4_BYTES 0x55555555
+/*
+ * AES-GCM J0 length
+ */
+#define AES_GCM_J0_LEN 16
+
/* 3DES key sizes */
#define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */
#define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */
--
2.1.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [dpdk-dev] [PATCH 2/2] test: add crypto aes-gcm J0 test case
2020-03-13 18:07 [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling Arek Kusztal
@ 2020-03-13 18:07 ` Arek Kusztal
2020-03-16 16:26 ` Trahe, Fiona
2020-03-16 16:25 ` [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling Trahe, Fiona
1 sibling, 1 reply; 6+ messages in thread
From: Arek Kusztal @ 2020-03-13 18:07 UTC (permalink / raw)
To: dev; +Cc: akhil.goyal, fiona.trahe, Arek Kusztal
This patch adds crypto J0 test case to AES-GCM
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
app/test/test_cryptodev.c | 28 ++++++++++++++--
app/test/test_cryptodev.h | 1 +
app/test/test_cryptodev_aead_test_vectors.h | 51 +++++++++++++++++++++++++++++
3 files changed, 77 insertions(+), 3 deletions(-)
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 7b1ef5c..927c3b7 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -6885,9 +6885,15 @@ create_aead_operation(enum rte_crypto_aead_operation op,
uint8_t *iv_ptr = rte_crypto_op_ctod_offset(ut_params->op,
uint8_t *, IV_OFFSET);
- rte_memcpy(iv_ptr, tdata->iv.data, tdata->iv.len);
- debug_hexdump(stdout, "iv:", iv_ptr,
- tdata->iv.len);
+ if (tdata->iv.len == 0) {
+ rte_memcpy(iv_ptr, tdata->iv.data, AES_GCM_J0_LENGTH);
+ debug_hexdump(stdout, "iv:", iv_ptr,
+ AES_GCM_J0_LENGTH);
+ } else {
+ rte_memcpy(iv_ptr, tdata->iv.data, tdata->iv.len);
+ debug_hexdump(stdout, "iv:", iv_ptr,
+ tdata->iv.len);
+ }
}
/* Append plaintext/ciphertext */
@@ -7713,6 +7719,12 @@ test_AES_GCM_authenticated_encryption_test_case_8(void)
}
static int
+test_AES_GCM_J0_authenticated_encryption_test_case_1(void)
+{
+ return test_authenticated_encryption(&gcm_J0_test_case_1);
+}
+
+static int
test_AES_GCM_auth_encryption_test_case_192_1(void)
{
return test_authenticated_encryption(&gcm_test_case_192_1);
@@ -8046,6 +8058,12 @@ test_AES_GCM_authenticated_decryption_test_case_8(void)
}
static int
+test_AES_GCM_J0_authenticated_decryption_test_case_1(void)
+{
+ return test_authenticated_decryption(&gcm_J0_test_case_1);
+}
+
+static int
test_AES_GCM_auth_decryption_test_case_192_1(void)
{
return test_authenticated_decryption(&gcm_test_case_192_1);
@@ -11755,6 +11773,8 @@ static struct unit_test_suite cryptodev_testsuite = {
test_AES_GCM_authenticated_encryption_test_case_7),
TEST_CASE_ST(ut_setup, ut_teardown,
test_AES_GCM_authenticated_encryption_test_case_8),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_AES_GCM_J0_authenticated_encryption_test_case_1),
/** AES GCM Authenticated Decryption */
TEST_CASE_ST(ut_setup, ut_teardown,
@@ -11773,6 +11793,8 @@ static struct unit_test_suite cryptodev_testsuite = {
test_AES_GCM_authenticated_decryption_test_case_7),
TEST_CASE_ST(ut_setup, ut_teardown,
test_AES_GCM_authenticated_decryption_test_case_8),
+ TEST_CASE_ST(ut_setup, ut_teardown,
+ test_AES_GCM_J0_authenticated_decryption_test_case_1),
/** AES GCM Authenticated Encryption 192 bits key */
TEST_CASE_ST(ut_setup, ut_teardown,
diff --git a/app/test/test_cryptodev.h b/app/test/test_cryptodev.h
index def304e..41542e0 100644
--- a/app/test/test_cryptodev.h
+++ b/app/test/test_cryptodev.h
@@ -44,6 +44,7 @@
#define TRUNCATED_DIGEST_BYTE_LENGTH_SHA512 (32)
#define MAXIMUM_IV_LENGTH (16)
+#define AES_GCM_J0_LENGTH (16)
#define IV_OFFSET (sizeof(struct rte_crypto_op) + \
sizeof(struct rte_crypto_sym_op) + DEFAULT_NUM_XFORMS * \
diff --git a/app/test/test_cryptodev_aead_test_vectors.h b/app/test/test_cryptodev_aead_test_vectors.h
index a4a3a25..e62fdb2 100644
--- a/app/test/test_cryptodev_aead_test_vectors.h
+++ b/app/test/test_cryptodev_aead_test_vectors.h
@@ -982,6 +982,57 @@ static const struct aead_test_data gcm_test_case_8 = {
}
};
+static const struct aead_test_data gcm_J0_test_case_1 = {
+ .algo = RTE_CRYPTO_AEAD_AES_GCM,
+ .key = {
+ .data = {
+ 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+ 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08 },
+ .len = 16
+ },
+ .iv = {
+ .data = {
+ 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+ 0xde, 0xca, 0xf8, 0x88, 0x00, 0x00, 0x00, 0x01 },
+ .len = 0
+ },
+ .aad = {
+ .data = gcm_aad_zero_text,
+ .len = 0
+ },
+ .plaintext = {
+ .data = {
+ 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+ 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+ 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+ 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+ 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+ 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+ 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+ 0xba, 0x63, 0x7b, 0x39, 0x1a, 0xaf, 0xd2, 0x55 },
+ .len = 64
+ },
+ .ciphertext = {
+ .data = {
+ 0x42, 0x83, 0x1e, 0xc2, 0x21, 0x77, 0x74, 0x24,
+ 0x4b, 0x72, 0x21, 0xb7, 0x84, 0xd0, 0xd4, 0x9c,
+ 0xe3, 0xaa, 0x21, 0x2f, 0x2c, 0x02, 0xa4, 0xe0,
+ 0x35, 0xc1, 0x7e, 0x23, 0x29, 0xac, 0xa1, 0x2e,
+ 0x21, 0xd5, 0x14, 0xb2, 0x54, 0x66, 0x93, 0x1c,
+ 0x7d, 0x8f, 0x6a, 0x5a, 0xac, 0x84, 0xaa, 0x05,
+ 0x1b, 0xa3, 0x0b, 0x39, 0x6a, 0x0a, 0xac, 0x97,
+ 0x3d, 0x58, 0xe0, 0x91, 0x47, 0x3f, 0x59, 0x85
+ },
+ .len = 64
+ },
+ .auth_tag = {
+ .data = {
+ 0x4d, 0x5c, 0x2a, 0xf3, 0x27, 0xcd, 0x64, 0xa6,
+ 0x2c, 0xf3, 0x5a, 0xbd, 0x2b, 0xa6, 0xfa, 0xb4 },
+ .len = 16
+ }
+};
+
/** AES-GCM-192 Test Vectors */
static const struct aead_test_data gcm_test_case_192_1 = {
.algo = RTE_CRYPTO_AEAD_AES_GCM,
--
2.1.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling
2020-03-13 18:07 [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling Arek Kusztal
2020-03-13 18:07 ` [dpdk-dev] [PATCH 2/2] test: add crypto aes-gcm J0 test case Arek Kusztal
@ 2020-03-16 16:25 ` Trahe, Fiona
2020-03-25 19:04 ` Akhil Goyal
1 sibling, 1 reply; 6+ messages in thread
From: Trahe, Fiona @ 2020-03-16 16:25 UTC (permalink / raw)
To: Kusztal, ArkadiuszX, dev; +Cc: akhil.goyal
> -----Original Message-----
> From: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>
> Sent: Friday, March 13, 2020 6:08 PM
> To: dev@dpdk.org
> Cc: akhil.goyal@nxp.com; Trahe, Fiona <fiona.trahe@intel.com>; Kusztal, ArkadiuszX
> <arkadiuszx.kusztal@intel.com>
> Subject: [PATCH 1/2] crypto/qat: add aes-gcm J0 handling
>
> This patch adds J0 capability to Intel QuickAssist Technology driver
>
> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [PATCH 2/2] test: add crypto aes-gcm J0 test case
2020-03-13 18:07 ` [dpdk-dev] [PATCH 2/2] test: add crypto aes-gcm J0 test case Arek Kusztal
@ 2020-03-16 16:26 ` Trahe, Fiona
2020-03-25 19:05 ` Akhil Goyal
0 siblings, 1 reply; 6+ messages in thread
From: Trahe, Fiona @ 2020-03-16 16:26 UTC (permalink / raw)
To: Kusztal, ArkadiuszX, dev; +Cc: akhil.goyal
> -----Original Message-----
> From: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>
> Sent: Friday, March 13, 2020 6:08 PM
> To: dev@dpdk.org
> Cc: akhil.goyal@nxp.com; Trahe, Fiona <fiona.trahe@intel.com>; Kusztal, ArkadiuszX
> <arkadiuszx.kusztal@intel.com>
> Subject: [PATCH 2/2] test: add crypto aes-gcm J0 test case
>
> This patch adds crypto J0 test case to AES-GCM
>
> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling
2020-03-16 16:25 ` [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling Trahe, Fiona
@ 2020-03-25 19:04 ` Akhil Goyal
0 siblings, 0 replies; 6+ messages in thread
From: Akhil Goyal @ 2020-03-25 19:04 UTC (permalink / raw)
To: Trahe, Fiona, Kusztal, ArkadiuszX, dev
> >
> > This patch adds J0 capability to Intel QuickAssist Technology driver
> >
> > Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
>
>
Applied to dpdk-next-crypto
Thanks.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [PATCH 2/2] test: add crypto aes-gcm J0 test case
2020-03-16 16:26 ` Trahe, Fiona
@ 2020-03-25 19:05 ` Akhil Goyal
0 siblings, 0 replies; 6+ messages in thread
From: Akhil Goyal @ 2020-03-25 19:05 UTC (permalink / raw)
To: Trahe, Fiona, Kusztal, ArkadiuszX, dev
> >
> > This patch adds crypto J0 test case to AES-GCM
> >
> > Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Applied to dpdk-next-crypto
Thanks.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-03-25 19:05 UTC | newest]
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2020-03-13 18:07 [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling Arek Kusztal
2020-03-13 18:07 ` [dpdk-dev] [PATCH 2/2] test: add crypto aes-gcm J0 test case Arek Kusztal
2020-03-16 16:26 ` Trahe, Fiona
2020-03-25 19:05 ` Akhil Goyal
2020-03-16 16:25 ` [dpdk-dev] [PATCH 1/2] crypto/qat: add aes-gcm J0 handling Trahe, Fiona
2020-03-25 19:04 ` Akhil Goyal
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