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Mon, 12 Apr 2021 05:10:56 +0000 From: "Gujjar, Abhinandan S" To: Shijith Thotton , "dev@dpdk.org" CC: "thomas@monjalon.net" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" , "nipun.gupta@nxp.com" , "sachin.saxena@oss.nxp.com" , "anoobj@marvell.com" , "matan@nvidia.com" , "Zhang, Roy Fan" , "g.singh@nxp.com" , "Carrillo, Erik G" , "Jayatheerthan, Jay" , "pbhagavatula@marvell.com" , "Van Haaren, Harry" , Akhil Goyal Thread-Topic: [PATCH v6 3/3] test/event_crypto: use crypto adapter enqueue API Thread-Index: AQHXLUjDaTOulGOoJ0+URegO1N3vQaqwWTWA Date: Mon, 12 Apr 2021 05:10:56 +0000 Message-ID: References: <2a75b99054e6befb8e3b2583ba645b643a758082.1617972131.git.sthotton@marvell.com> In-Reply-To: <2a75b99054e6befb8e3b2583ba645b643a758082.1617972131.git.sthotton@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: marvell.com; dkim=none (message not signed) header.d=none;marvell.com; dmarc=none action=none header.from=intel.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN8PR11MB3537.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b79f82bc-3a3e-4724-e016-08d8fd715aab X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Apr 2021 05:10:56.5871 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: cUn1tox0lFHpV3PVaclS2Q/l9TbAI7o6GvOs8hp+ln0UlYNJZMcL/DiOLUp92kNErDhw6bMly7MJRJvvf1AfCn+XWNZudou0bWnN98rlcWo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR11MB3780 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v6 3/3] test/event_crypto: use crypto adapter enqueue API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Shijith, CI is failing for this patch -> ci/Intel-compilation fail apply issues Whereas CI is not running for other patches. Could you please check? Regards Abhinandan > -----Original Message----- > From: Shijith Thotton > Sent: Friday, April 9, 2021 7:30 PM > To: dev@dpdk.org > Cc: Shijith Thotton ; thomas@monjalon.net; > jerinj@marvell.com; Gujjar, Abhinandan S ; > hemant.agrawal@nxp.com; nipun.gupta@nxp.com; > sachin.saxena@oss.nxp.com; anoobj@marvell.com; matan@nvidia.com; > Zhang, Roy Fan ; g.singh@nxp.com; Carrillo, Erik > G ; Jayatheerthan, Jay > ; pbhagavatula@marvell.com; Van Haaren, > Harry ; Akhil Goyal > Subject: [PATCH v6 3/3] test/event_crypto: use crypto adapter enqueue API >=20 > Use rte_event_crypto_adapter_enqueue() API to enqueue events to crypto > adapter if forward mode is supported in driver. >=20 > Signed-off-by: Shijith Thotton > --- > app/test/test_event_crypto_adapter.c | 33 ++++++++++++++++++---------- > 1 file changed, 21 insertions(+), 12 deletions(-) >=20 > diff --git a/app/test/test_event_crypto_adapter.c > b/app/test/test_event_crypto_adapter.c > index 335211cd8..f689bc1f2 100644 > --- a/app/test/test_event_crypto_adapter.c > +++ b/app/test/test_event_crypto_adapter.c > @@ -64,6 +64,7 @@ struct event_crypto_adapter_test_params { > struct rte_mempool *session_priv_mpool; > struct rte_cryptodev_config *config; > uint8_t crypto_event_port_id; > + uint8_t internal_port_op_fwd; > }; >=20 > struct rte_event response_info =3D { > @@ -110,9 +111,12 @@ send_recv_ev(struct rte_event *ev) > struct rte_event recv_ev; > int ret; >=20 > - ret =3D rte_event_enqueue_burst(evdev, TEST_APP_PORT_ID, ev, > NUM); > - TEST_ASSERT_EQUAL(ret, NUM, > - "Failed to send event to crypto adapter\n"); > + if (params.internal_port_op_fwd) > + ret =3D rte_event_crypto_adapter_enqueue(evdev, > TEST_APP_PORT_ID, > + ev, NUM); > + else > + ret =3D rte_event_enqueue_burst(evdev, > TEST_APP_PORT_ID, ev, NUM); > + TEST_ASSERT_EQUAL(ret, NUM, "Failed to send event to crypto > +adapter\n"); >=20 > while (rte_event_dequeue_burst(evdev, > TEST_APP_PORT_ID, &recv_ev, NUM, 0) =3D=3D 0) @@ - > 747,9 +751,12 @@ configure_event_crypto_adapter(enum > rte_event_crypto_adapter_mode mode) > !(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND)) > goto adapter_create; >=20 > - if ((mode =3D=3D RTE_EVENT_CRYPTO_ADAPTER_OP_FORWARD) && > - !(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD)) > - return -ENOTSUP; > + if (mode =3D=3D RTE_EVENT_CRYPTO_ADAPTER_OP_FORWARD) { > + if (cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD) > + params.internal_port_op_fwd =3D 1; > + else > + return -ENOTSUP; > + } >=20 > if ((mode =3D=3D RTE_EVENT_CRYPTO_ADAPTER_OP_NEW) && > !(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW)) > @@ -771,9 +778,11 @@ configure_event_crypto_adapter(enum > rte_event_crypto_adapter_mode mode) >=20 > TEST_ASSERT_SUCCESS(ret, "Failed to add queue pair\n"); >=20 > - ret =3D > rte_event_crypto_adapter_event_port_get(TEST_ADAPTER_ID, > - ¶ms.crypto_event_port_id); > - TEST_ASSERT_SUCCESS(ret, "Failed to get event port\n"); > + if (!params.internal_port_op_fwd) { > + ret =3D > rte_event_crypto_adapter_event_port_get(TEST_ADAPTER_ID, > + > ¶ms.crypto_event_port_id); > + TEST_ASSERT_SUCCESS(ret, "Failed to get event port\n"); > + } >=20 > return TEST_SUCCESS; > } > @@ -809,15 +818,15 @@ test_crypto_adapter_conf(enum > rte_event_crypto_adapter_mode mode) >=20 > if (!crypto_adapter_setup_done) { > ret =3D configure_event_crypto_adapter(mode); > - if (!ret) { > + if (ret) > + return ret; > + if (!params.internal_port_op_fwd) { > qid =3D TEST_CRYPTO_EV_QUEUE_ID; > ret =3D rte_event_port_link(evdev, > params.crypto_event_port_id, &qid, NULL, > 1); > TEST_ASSERT(ret >=3D 0, "Failed to link queue %d " > "port=3D%u\n", qid, > params.crypto_event_port_id); > - } else { > - return ret; > } > crypto_adapter_setup_done =3D 1; > } > -- > 2.25.1