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Mon, 12 Oct 2020 07:46:55 +0000 From: "Wang, Haiyue" To: "Burakov, Anatoly" , "dev@dpdk.org" CC: "Ma, Liang J" , "Guo, Jia" , "Hunt, David" , "Ananyev, Konstantin" , "jerinjacobk@gmail.com" , "Richardson, Bruce" , "thomas@monjalon.net" , "McDaniel, Timothy" , "Eads, Gage" , "Macnamara, Chris" Thread-Topic: [PATCH v5 06/10] net/ixgbe: implement power management API Thread-Index: AQHWnlXYcFvgO3qBbkShoOmKIm/VC6mTmP7w Date: Mon, 12 Oct 2020 07:46:55 +0000 Message-ID: References: <1601647919-25312-1-git-send-email-liang.j.ma@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.102.204.37] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 292357a9-5063-49dd-bda1-08d86e82fdda x-ms-traffictypediagnostic: BN6PR11MB1731: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7219; 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Guo, Jia ; Wan= g, Haiyue > ; Hunt, David ; Ananyev, Kon= stantin > ; jerinjacobk@gmail.com; Richardson, Bruce = ; > thomas@monjalon.net; McDaniel, Timothy ; Eads= , Gage ; > Macnamara, Chris > Subject: [PATCH v5 06/10] net/ixgbe: implement power management API >=20 > From: Liang Ma >=20 > Implement support for the power management API by implementing a > `get_wake_addr` function that will return an address of an RX ring's > status bit. >=20 > Signed-off-by: Anatoly Burakov > Signed-off-by: Liang Ma > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 1 + > drivers/net/ixgbe/ixgbe_rxtx.c | 22 ++++++++++++++++++++++ > drivers/net/ixgbe/ixgbe_rxtx.h | 2 ++ > 3 files changed, 25 insertions(+) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_e= thdev.c > index 0b98e210e7..30b3f416d4 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -588,6 +588,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops =3D= { > .udp_tunnel_port_del =3D ixgbe_dev_udp_tunnel_port_del, > .tm_ops_get =3D ixgbe_tm_ops_get, > .tx_done_cleanup =3D ixgbe_dev_tx_done_cleanup, > + .get_wake_addr =3D ixgbe_get_wake_addr, > }; >=20 > /* > diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxt= x.c > index 977ecf5137..7a9fd2aec6 100644 > --- a/drivers/net/ixgbe/ixgbe_rxtx.c > +++ b/drivers/net/ixgbe/ixgbe_rxtx.c > @@ -1366,6 +1366,28 @@ const uint32_t > RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP, > }; >=20 > +int ixgbe_get_wake_addr(void *rx_queue, volatile void **tail_desc_addr, > + uint64_t *expected, uint64_t *mask) > +{ > + volatile union ixgbe_adv_rx_desc *rxdp; > + struct ixgbe_rx_queue *rxq =3D rx_queue; > + uint16_t desc; > + > + desc =3D rxq->rx_tail; > + rxdp =3D &rxq->rx_ring[desc]; > + /* watch for changes in status bit */ > + *tail_desc_addr =3D &rxdp->wb.upper.status_error; > + > + /* > + * we expect the DD bit to be set to 1 if this descriptor was already > + * written to. > + */ > + *expected =3D rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD); > + *mask =3D rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD); > + > + return 0; > +} > + I'm wondering that whether the '.get_wake_addr' can be specific to like 'rxq_tailq_addr_get' ? So that one day this wake up mechanism can be applied to 'txq_tailq_addr_get' ? :-) Also, "volatile void **tail_desc_addr, uint64_t *expected, uint64_t *mask" can be merged into 'struct xxx' ? So that you can expand the API easily. Just my thoughts. Anyway, LGTM Acked-by: Haiyue Wang > -- > 2.17.1