* [PATCH v1] net/mlx5: enable hint in async table
@ 2023-02-16 5:49 Rongwei Liu
2023-03-06 8:22 ` Rongwei Liu
2023-03-06 11:36 ` [PATCH v2] " Rongwei Liu
0 siblings, 2 replies; 5+ messages in thread
From: Rongwei Liu @ 2023-02-16 5:49 UTC (permalink / raw)
To: dev, matan, viacheslavo, orika, thomas; +Cc: rasland
Driver gets the hint value from rte_table_attr for async flow.
Parse the value and pass the supported value to hardware accordingly.
Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_hw.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index b67b33bc22..06d6909974 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -3102,6 +3102,15 @@ flow_hw_table_create(struct rte_eth_dev *dev,
matcher_attr.optimize_using_rule_idx = true;
matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
matcher_attr.rule.num_log = rte_log2_u32(nb_flows);
+ /* Parse hints information. */
+ if (attr->specialize) {
+ if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG)
+ matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_WIRE;
+ else if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG)
+ matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_VPORT;
+ else
+ DRV_LOG(INFO, "Unsupported hint value %x", attr->specialize);
+ }
/* Build the item template. */
for (i = 0; i < nb_item_templates; i++) {
uint32_t ret;
--
2.27.0
^ permalink raw reply [flat|nested] 5+ messages in thread* RE: [PATCH v1] net/mlx5: enable hint in async table
2023-02-16 5:49 [PATCH v1] net/mlx5: enable hint in async table Rongwei Liu
@ 2023-03-06 8:22 ` Rongwei Liu
2023-03-06 11:36 ` [PATCH v2] " Rongwei Liu
1 sibling, 0 replies; 5+ messages in thread
From: Rongwei Liu @ 2023-03-06 8:22 UTC (permalink / raw)
To: Rongwei Liu, dev, Matan Azrad, Slava Ovsiienko, Ori Kam,
NBU-Contact-Thomas Monjalon (EXTERNAL)
Cc: Raslan Darawsheh
@Slava Ovsiienko Can you help review and ACK?
BR
Rongwei
> -----Original Message-----
> From: Rongwei Liu <rongweil@nvidia.com>
> Sent: Thursday, February 16, 2023 13:49
> To: dev@dpdk.org; Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Ori Kam <orika@nvidia.com>; NBU-Contact-
> Thomas Monjalon (EXTERNAL) <thomas@monjalon.net>
> Cc: Raslan Darawsheh <rasland@nvidia.com>
> Subject: [PATCH v1] net/mlx5: enable hint in async table
>
> External email: Use caution opening links or attachments
>
>
> Driver gets the hint value from rte_table_attr for async flow.
> Parse the value and pass the supported value to hardware accordingly.
>
> Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
> Acked-by: Ori Kam <orika@nvidia.com>
> ---
> drivers/net/mlx5/mlx5_flow_hw.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/net/mlx5/mlx5_flow_hw.c
> b/drivers/net/mlx5/mlx5_flow_hw.c index b67b33bc22..06d6909974 100644
> --- a/drivers/net/mlx5/mlx5_flow_hw.c
> +++ b/drivers/net/mlx5/mlx5_flow_hw.c
> @@ -3102,6 +3102,15 @@ flow_hw_table_create(struct rte_eth_dev *dev,
> matcher_attr.optimize_using_rule_idx = true;
> matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
> matcher_attr.rule.num_log = rte_log2_u32(nb_flows);
> + /* Parse hints information. */
> + if (attr->specialize) {
> + if (attr->specialize ==
> RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG)
> + matcher_attr.optimize_flow_src =
> MLX5DR_MATCHER_FLOW_SRC_WIRE;
> + else if (attr->specialize ==
> RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG)
> + matcher_attr.optimize_flow_src =
> MLX5DR_MATCHER_FLOW_SRC_VPORT;
> + else
> + DRV_LOG(INFO, "Unsupported hint value %x", attr->specialize);
> + }
> /* Build the item template. */
> for (i = 0; i < nb_item_templates; i++) {
> uint32_t ret;
> --
> 2.27.0
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v2] net/mlx5: enable hint in async table
2023-02-16 5:49 [PATCH v1] net/mlx5: enable hint in async table Rongwei Liu
2023-03-06 8:22 ` Rongwei Liu
@ 2023-03-06 11:36 ` Rongwei Liu
2023-03-06 11:59 ` Slava Ovsiienko
2023-03-07 9:02 ` Raslan Darawsheh
1 sibling, 2 replies; 5+ messages in thread
From: Rongwei Liu @ 2023-03-06 11:36 UTC (permalink / raw)
To: dev; +Cc: Matan Azrad, Viacheslav Ovsiienko
Driver gets the hint value from rte_table_attr for async flow.
Parse the value and pass the supported value to hardware accordingly.
Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_hw.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index b67b33bc22..70b8e130e8 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -3098,10 +3098,20 @@ flow_hw_table_create(struct rte_eth_dev *dev,
grp = container_of(ge, struct mlx5_flow_group, entry);
tbl->grp = grp;
/* Prepare matcher information. */
+ matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_ANY;
matcher_attr.priority = attr->flow_attr.priority;
matcher_attr.optimize_using_rule_idx = true;
matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
matcher_attr.rule.num_log = rte_log2_u32(nb_flows);
+ /* Parse hints information. */
+ if (attr->specialize) {
+ if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG)
+ matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_WIRE;
+ else if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG)
+ matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_VPORT;
+ else
+ DRV_LOG(INFO, "Unsupported hint value %x", attr->specialize);
+ }
/* Build the item template. */
for (i = 0; i < nb_item_templates; i++) {
uint32_t ret;
--
2.27.0
^ permalink raw reply [flat|nested] 5+ messages in thread* RE: [PATCH v2] net/mlx5: enable hint in async table
2023-03-06 11:36 ` [PATCH v2] " Rongwei Liu
@ 2023-03-06 11:59 ` Slava Ovsiienko
2023-03-07 9:02 ` Raslan Darawsheh
1 sibling, 0 replies; 5+ messages in thread
From: Slava Ovsiienko @ 2023-03-06 11:59 UTC (permalink / raw)
To: Rongwei Liu, dev; +Cc: Matan Azrad
> -----Original Message-----
> From: Rongwei Liu <rongweil@nvidia.com>
> Sent: понедельник, 6 марта 2023 г. 13:37
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>
> Subject: [PATCH v2] net/mlx5: enable hint in async table
>
> Driver gets the hint value from rte_table_attr for async flow.
> Parse the value and pass the supported value to hardware accordingly.
>
> Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH v2] net/mlx5: enable hint in async table
2023-03-06 11:36 ` [PATCH v2] " Rongwei Liu
2023-03-06 11:59 ` Slava Ovsiienko
@ 2023-03-07 9:02 ` Raslan Darawsheh
1 sibling, 0 replies; 5+ messages in thread
From: Raslan Darawsheh @ 2023-03-07 9:02 UTC (permalink / raw)
To: Rongwei Liu, dev; +Cc: Matan Azrad, Slava Ovsiienko
Hi,
> -----Original Message-----
> From: Rongwei Liu <rongweil@nvidia.com>
> Sent: Monday, March 6, 2023 1:37 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>
> Subject: [PATCH v2] net/mlx5: enable hint in async table
>
> Driver gets the hint value from rte_table_attr for async flow.
> Parse the value and pass the supported value to hardware accordingly.
>
> Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
> ---
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-03-07 9:02 UTC | newest]
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2023-02-16 5:49 [PATCH v1] net/mlx5: enable hint in async table Rongwei Liu
2023-03-06 8:22 ` Rongwei Liu
2023-03-06 11:36 ` [PATCH v2] " Rongwei Liu
2023-03-06 11:59 ` Slava Ovsiienko
2023-03-07 9:02 ` Raslan Darawsheh
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