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Fixing now in v8.=20 > -----Original Message----- > From: Akhil Goyal > Sent: Wednesday, September 21, 2022 12:00 PM > To: Chautru, Nicolas ; dev@dpdk.org; > thomas@monjalon.net; hemant.agrawal@nxp.com > Cc: maxime.coquelin@redhat.com; trix@redhat.com; mdr@ashroe.eu; > Richardson, Bruce ; > david.marchand@redhat.com; stephen@networkplumber.org; Zhang, > Mingshan > Subject: RE: [EXT] [PATCH v7 4/7] drivers/baseband: update PMDs to expose > queue per operation >=20 > > Add support in existing bbdev PMDs for the explicit number of queues > > and priority for each operation type configured on the device. > > > > Signed-off-by: Nicolas Chautru > > Acked-by: Maxime Coquelin > > --- > > drivers/baseband/acc100/rte_acc100_pmd.c | 29 +++++++++++++-= -- > ------ > > drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 8 ++++++ > > drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 8 ++++++ > > drivers/baseband/la12xx/bbdev_la12xx.c | 7 ++++++ > > drivers/baseband/turbo_sw/bbdev_turbo_software.c | 11 ++++++++ > > 5 files changed, 51 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c > > b/drivers/baseband/acc100/rte_acc100_pmd.c > > index 17ba798..f967e3f 100644 > > --- a/drivers/baseband/acc100/rte_acc100_pmd.c > > +++ b/drivers/baseband/acc100/rte_acc100_pmd.c > > @@ -966,6 +966,7 @@ > > struct rte_bbdev_driver_info *dev_info) { > > struct acc100_device *d =3D dev->data->dev_private; > > + int i; > > > > static const struct rte_bbdev_op_cap bbdev_capabilities[] =3D { > > { > > @@ -1062,19 +1063,23 @@ > > fetch_acc100_config(dev); > > dev_info->device_status =3D RTE_BBDEV_DEV_NOT_SUPPORTED; > > > > - /* This isn't ideal because it reports the maximum number of queues > but > > - * does not provide info on how many can be uplink/downlink or > > different > > - * priorities > > - */ > > - dev_info->max_num_queues =3D > > - d->acc100_conf.q_dl_5g.num_aqs_per_groups * > > - d->acc100_conf.q_dl_5g.num_qgroups + > > - d->acc100_conf.q_ul_5g.num_aqs_per_groups * > > - d->acc100_conf.q_ul_5g.num_qgroups + > > - d->acc100_conf.q_dl_4g.num_aqs_per_groups * > > - d->acc100_conf.q_dl_4g.num_qgroups + > > - d->acc100_conf.q_ul_4g.num_aqs_per_groups * > > + /* Expose number of queues */ > > + dev_info->num_queues[RTE_BBDEV_OP_NONE] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] =3D d- > > >acc100_conf.q_ul_4g.num_aqs_per_groups * > > d->acc100_conf.q_ul_4g.num_qgroups; > > + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] =3D d- > > >acc100_conf.q_dl_4g.num_aqs_per_groups * > > + d->acc100_conf.q_dl_4g.num_qgroups; > > + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] =3D d- > > >acc100_conf.q_ul_5g.num_aqs_per_groups * > > + d->acc100_conf.q_ul_5g.num_qgroups; > > + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] =3D d- > > >acc100_conf.q_dl_5g.num_aqs_per_groups * > > + d->acc100_conf.q_dl_5g.num_qgroups; > > + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] =3D d- > > >acc100_conf.q_ul_4g.num_qgroups; > > + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] =3D d- > > >acc100_conf.q_dl_4g.num_qgroups; > > + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] =3D d- > > >acc100_conf.q_ul_5g.num_qgroups; > > + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] =3D d- > > >acc100_conf.q_dl_5g.num_qgroups; > > + dev_info->max_num_queues =3D 0; > > + for (i =3D RTE_BBDEV_OP_TURBO_DEC; i <=3D > RTE_BBDEV_OP_LDPC_ENC; > > i++) > > + dev_info->max_num_queues +=3D dev_info->num_queues[i]; > > dev_info->queue_size_lim =3D ACC100_MAX_QUEUE_DEPTH; > > dev_info->hardware_accelerated =3D true; > > dev_info->max_dl_queue_priority =3D > > diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c > > b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c > > index 57b12af..b4982af 100644 > > --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c > > +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c > > @@ -379,6 +379,14 @@ > > if (hw_q_id !=3D FPGA_INVALID_HW_QUEUE_ID) > > dev_info->max_num_queues++; > > } > > + /* Expose number of queue per operation type */ > > + dev_info->num_queues[RTE_BBDEV_OP_NONE] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] =3D dev_info- > > >max_num_queues / 2; > > + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] =3D dev_info- > > >max_num_queues / 2; > > + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] =3D 1; > > + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] =3D 1; > > } > > > > /** > > diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c > > b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c > > index 2a330c4..dc7f479 100644 > > --- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c > > +++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c > > @@ -655,6 +655,14 @@ struct __rte_cache_aligned fpga_queue { > > if (hw_q_id !=3D FPGA_INVALID_HW_QUEUE_ID) > > dev_info->max_num_queues++; > > } > > + /* Expose number of queue per operation type */ > > + dev_info->num_queues[RTE_BBDEV_OP_NONE] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] =3D dev_info- > > >max_num_queues / 2; > > + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] =3D dev_info- > > >max_num_queues / 2; > > + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] =3D 0; > > + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] =3D 1; > > + dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] =3D 1; > > } > > > > /** > > diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c > > b/drivers/baseband/la12xx/bbdev_la12xx.c > > index c1f88c6..e99ea9a 100644 > > --- a/drivers/baseband/la12xx/bbdev_la12xx.c > > +++ b/drivers/baseband/la12xx/bbdev_la12xx.c > > @@ -102,6 +102,13 @@ struct bbdev_la12xx_params { > > dev_info->min_alignment =3D 64; > > dev_info->device_status =3D RTE_BBDEV_DEV_NOT_SUPPORTED; > > > > + dev_info->num_queues[RTE_BBDEV_OP_NONE] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] =3D 0; > > + dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] =3D > > LA12XX_MAX_QUEUES / 2; > > + dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] =3D > > LA12XX_MAX_QUEUES / 2; > > + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] =3D 1; > > + dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] =3D 1; > > rte_bbdev_log_debug("got device info from %u", dev->data- > >dev_id); > > } > > > > diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c > > b/drivers/baseband/turbo_sw/bbdev_turbo_software.c > > index dbc5524..647e706 100644 > > --- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c > > +++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c > > @@ -256,6 +256,17 @@ struct turbo_sw_queue { > > dev_info->data_endianness =3D RTE_LITTLE_ENDIAN; > > dev_info->device_status =3D RTE_BBDEV_DEV_NOT_SUPPORTED; > > > > + const struct rte_bbdev_op_cap *op_cap =3D bbdev_capabilities; > > + int num_op_type =3D 0; >=20 > Variables should not be defined in middle of the function. > Also add a blank line after that. >=20 > > + for (; op_cap->type !=3D RTE_BBDEV_OP_NONE; ++op_cap) > > + num_op_type++; > > + op_cap =3D bbdev_capabilities; > > + if (num_op_type > 0) { > > + int num_queue_per_type =3D dev_info->max_num_queues / > > num_op_type; > > + for (; op_cap->type !=3D RTE_BBDEV_OP_NONE; ++op_cap) > > + dev_info->num_queues[op_cap->type] =3D > > num_queue_per_type; > > + } > > + > > rte_bbdev_log_debug("got device info from %u\n", dev->data- > >dev_id); > > } > > > > -- > > 1.8.3.1