RE: [PATCH v1 6/6] baseband/acc: acc100 fix queue mapping to 64 bits

RE: [PATCH v1 6/6] baseband/acc: acc100 fix queue mapping to 64 bits

[Chautru, Nicolas]

> From: Vargas, Hernan <hernan.vargas@intel.com>
> 
> Fix potential overflow for Q mapping extension to 64 bits.
> 
> Fixes: 32e8b7ea35d ("baseband/acc100: refactor to segregate common
> code")
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
(...)

For the series, thanks
Reviewed-by: Nicolas Chautru <nicolas.chautru@intel.com>

[PATCH v1 0/6] baseband/acc: changes for 23.03

[Hernan Vargas]

Upstreaming ACC100 changes for 23.03.

Hernan Vargas (6):
  baseband/acc: acc100 use define constant
  baseband/acc: acc100 use desc helper functions
  baseband/acc: acc100 free harq layout pointer
  baseband/acc: acc100 fix iteration counter in TB
  baseband/acc: acc100 ignore missing mempools
  baseband/acc: acc100 fix queue mapping to 64 bits

 drivers/baseband/acc/rte_acc100_pmd.c | 61 ++++++++++-----------------
 1 file changed, 23 insertions(+), 38 deletions(-)

-- 
2.37.1

[PATCH v1 1/6] baseband/acc: acc100 use define constant

[Hernan Vargas]

Use define constant ACC_HARQ_ALIGN_64B instead of hardcoded number.
No functional impact.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc/rte_acc100_pmd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index ba8247d47e..2b3e9090b4 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -1391,7 +1391,7 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
 		harq_in_length = RTE_MIN(harq_in_length, op->ldpc_dec.n_cb
 				- op->ldpc_dec.n_filler);
 		/* Alignment on next 64B - Already enforced from HC output */
-		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
+		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC_HARQ_ALIGN_64B);
 		fcw->hcin_size0 = harq_in_length;
 		fcw->hcin_offset = 0;
 		fcw->hcin_size1 = 0;
@@ -1434,7 +1434,7 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
 		/* Cannot exceed the pruned Ncb circular buffer */
 		harq_out_length = RTE_MIN(harq_out_length, ncb_p);
 		/* Alignment on next 64B */
-		harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 64);
+		harq_out_length = RTE_ALIGN_CEIL(harq_out_length, ACC_HARQ_ALIGN_64B);
 		fcw->hcout_size0 = harq_out_length;
 		fcw->hcout_size1 = 0;
 		fcw->hcout_offset = 0;
-- 
2.37.1

[PATCH v1 2/6] baseband/acc: acc100 use desc helper functions

[Hernan Vargas]

Use the designated descriptor helper functions for descriptor address
calculations.
No functional impact.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc/rte_acc100_pmd.c | 38 +++++++++------------------
 1 file changed, 13 insertions(+), 25 deletions(-)

diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 2b3e9090b4..97c800913a 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -2423,9 +2423,8 @@ enqueue_ldpc_enc_part_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
 	struct rte_mbuf *output_head, *output;
 	int i, next_triplet;
 	struct rte_bbdev_op_ldpc_enc *enc = &op->ldpc_enc;
-	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_descs) & q->sw_ring_wrap_mask);
 
-	desc = q->ring_addr + desc_idx;
+	desc = acc_desc(q, total_enqueued_descs);
 	acc_fcw_le_fill(op, &desc->req.fcw_le, num_cbs, e);
 
 	/* This could be done at polling. */
@@ -2614,7 +2613,6 @@ enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
 	}
 #endif
 	uint8_t num_a, num_b;
-	uint16_t desc_idx;
 	uint8_t r = op->ldpc_enc.tb_params.r;
 	uint8_t cab =  op->ldpc_enc.tb_params.cab;
 	union acc_dma_desc *desc;
@@ -2656,16 +2654,15 @@ enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
 
 	return_descs = enq_descs - init_enq_descs;
 	/* Keep total number of CBs in first TB. */
-	desc_idx = ((q->sw_ring_head + init_enq_descs) & q->sw_ring_wrap_mask);
-	desc = q->ring_addr + desc_idx;
+	desc = acc_desc(q, init_enq_descs);
 	desc->req.cbs_in_tb = return_descs; /** Actual number of descriptors. */
 	desc->req.op_addr = op;
 
 	/* Set SDone on last CB descriptor for TB mode. */
-	desc_idx = ((q->sw_ring_head + enq_descs - 1) & q->sw_ring_wrap_mask);
-	desc = q->ring_addr + desc_idx;
+	desc = acc_desc(q, enq_descs - 1);
 	desc->req.sdone_enable = 1;
 	desc->req.op_addr = op;
+
 	return return_descs;
 }
 
@@ -3276,7 +3273,7 @@ enqueue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
 		h_out_length, mbuf_total_left, seg_total_left;
 	struct rte_mbuf *input, *h_output_head, *h_output,
 		*s_output_head, *s_output;
-	uint16_t desc_idx, current_enqueued_cbs = 0;
+	uint16_t current_enqueued_cbs = 0;
 	uint64_t fcw_offset;
 
 #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
@@ -3291,9 +3288,8 @@ enqueue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
 	}
 #endif
 
-	desc_idx = acc_desc_idx(q, total_enqueued_cbs);
-	desc = q->ring_addr + desc_idx;
-	fcw_offset = (desc_idx << 8) + ACC_DESC_FCW_OFFSET;
+	desc = acc_desc(q, total_enqueued_cbs);
+	fcw_offset = (acc_desc_idx(q, total_enqueued_cbs) << 8) + ACC_DESC_FCW_OFFSET;
 	acc100_fcw_td_fill(op, &desc->req.fcw_td);
 
 	input = op->turbo_dec.input.data;
@@ -3423,8 +3419,7 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
 		avail--;
 		enq = RTE_MIN(left, ACC_MUX_5GDL_DESC);
 		if (check_mux(&ops[i], enq)) {
-			ret = enqueue_ldpc_enc_n_op_cb(q, &ops[i],
-					desc_idx, enq);
+			ret = enqueue_ldpc_enc_n_op_cb(q, &ops[i], desc_idx, enq);
 			if (ret < 0) {
 				acc_enqueue_invalid(q_data);
 				break;
@@ -3778,7 +3773,6 @@ dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
 
 	/* Clearing status, it will be set based on response */
 	op->status = 0;
-
 	op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
 	op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
 
@@ -4024,8 +4018,8 @@ dequeue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
 		atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
 				__ATOMIC_RELAXED);
 		rsp.val = atom_desc.rsp.val;
-		rte_bbdev_log_debug("Resp. desc %p: %x", desc,
-				rsp.val);
+		rte_bbdev_log_debug("Resp. desc %p: %x r %d c %d\n",
+						desc, rsp.val, cb_idx, cbs_in_tb);
 
 		op->status |= ((rsp.input_err) ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
 		op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
@@ -4074,8 +4068,7 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,
 		return 0;
 	}
 #endif
-	op = (q->ring_addr + (q->sw_ring_tail &
-			q->sw_ring_wrap_mask))->req.op_addr;
+	op = acc_op_tail(q, 0);
 	if (unlikely(ops == NULL || op == NULL))
 		return 0;
 	cbm = op->turbo_enc.code_block_mode;
@@ -4117,7 +4110,6 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
 	uint16_t i, dequeued_ops = 0, dequeued_descs = 0;
 	int ret, cbm;
 	struct rte_bbdev_enc_op *op;
-	union acc_dma_desc *desc;
 
 	if (q == NULL)
 		return 0;
@@ -4125,10 +4117,7 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
 	if (unlikely(ops == 0))
 		return 0;
 #endif
-	desc = q->ring_addr + (q->sw_ring_tail & q->sw_ring_wrap_mask);
-	if (unlikely(desc == NULL))
-		return 0;
-	op = desc->req.op_addr;
+	op = acc_op_tail(q, 0);
 	if (unlikely(ops == NULL || op == NULL))
 		return 0;
 	cbm = op->ldpc_enc.code_block_mode;
@@ -4224,8 +4213,7 @@ acc100_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
 	dequeue_num = RTE_MIN(avail, num);
 
 	for (i = 0; i < dequeue_num; ++i) {
-		op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)
-			& q->sw_ring_wrap_mask))->req.op_addr;
+		op = acc_op_tail(q, dequeued_cbs);
 		if (unlikely(op == NULL))
 			break;
 		if (op->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
-- 
2.37.1

[PATCH v1 3/6] baseband/acc: acc100 free harq layout pointer

[Hernan Vargas]

Explicitly call rte_free for harq_layout pointer in dev_close function
to prevent memory leak.

Fixes: ba2262fe16c ("baseband/acc100: fix close cleanup")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc/rte_acc100_pmd.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 97c800913a..6ff7261823 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -622,6 +622,7 @@ acc100_dev_close(struct rte_bbdev *dev)
 		rte_free(d->tail_ptrs);
 		rte_free(d->info_ring);
 		rte_free(d->sw_rings_base);
+		rte_free(d->harq_layout);
 		d->sw_rings_base = NULL;
 		d->tail_ptrs = NULL;
 		d->info_ring = NULL;
-- 
2.37.1

[PATCH v1 4/6] baseband/acc: acc100 fix iteration counter in TB

[Hernan Vargas]

Use ldpc or turbo iteration counter based on the operation type.

Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc/rte_acc100_pmd.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 6ff7261823..08519121c8 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -4029,8 +4029,12 @@ dequeue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
 		/* CRC invalid if error exists */
 		if (!op->status)
 			op->status |= rsp.crc_status << RTE_BBDEV_CRC_ERROR;
-		op->turbo_dec.iter_count = RTE_MAX((uint8_t) rsp.iter_cnt,
-				op->turbo_dec.iter_count);
+		if (q->op_type == RTE_BBDEV_OP_LDPC_DEC)
+			op->ldpc_dec.iter_count = RTE_MAX((uint8_t) rsp.iter_cnt,
+					op->ldpc_dec.iter_count);
+		else
+			op->turbo_dec.iter_count = RTE_MAX((uint8_t) rsp.iter_cnt,
+					op->turbo_dec.iter_count);
 
 		/* Check if this is the last desc in batch (Atomic Queue) */
 		if (desc->req.last_desc_in_batch) {
-- 
2.37.1

[PATCH v1 5/6] baseband/acc: acc100 ignore missing mempools

[Hernan Vargas]

Mempool not strictly required to be present in op for processing.
Previous criteria too strict. No functional impact.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc/rte_acc100_pmd.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 08519121c8..7529918975 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -1832,10 +1832,6 @@ validate_enc_op(struct rte_bbdev_enc_op *op, struct acc_queue *q)
 	if (!validate_op_required(q))
 		return 0;
 
-	if (op->mempool == NULL) {
-		rte_bbdev_log(ERR, "Invalid mempool pointer");
-		return -1;
-	}
 	if (turbo_enc->input.data == NULL) {
 		rte_bbdev_log(ERR, "Invalid input pointer");
 		return -1;
@@ -2679,10 +2675,6 @@ validate_dec_op(struct rte_bbdev_dec_op *op, struct acc_queue *q)
 	if (!validate_op_required(q))
 		return 0;
 
-	if (op->mempool == NULL) {
-		rte_bbdev_log(ERR, "Invalid mempool pointer");
-		return -1;
-	}
 	if (turbo_dec->input.data == NULL) {
 		rte_bbdev_log(ERR, "Invalid input pointer");
 		return -1;
-- 
2.37.1

[PATCH v1 6/6] baseband/acc: acc100 fix queue mapping to 64 bits

[Hernan Vargas]

Fix potential overflow for Q mapping extension to 64 bits.

Fixes: 32e8b7ea35d ("baseband/acc100: refactor to segregate common code")

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 7529918975..8d8e85183d 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -664,7 +664,7 @@ acc100_find_free_queue_idx(struct rte_bbdev *dev,
 	for (aq_idx = 0; aq_idx < qtop->num_aqs_per_groups; aq_idx++) {
 		if (((d->q_assigned_bit_map[group_idx] >> aq_idx) & 0x1) == 0) {
 			/* Mark the Queue as assigned */
-			d->q_assigned_bit_map[group_idx] |= (1 << aq_idx);
+			d->q_assigned_bit_map[group_idx] |= (1ULL << aq_idx);
 			/* Report the AQ Index */
 			return (group_idx << ACC100_GRP_ID_SHIFT) + aq_idx;
 		}
-- 
2.37.1

Re: [PATCH v1 0/6] baseband/acc: changes for 23.03

[Maxime Coquelin]

Hi Hernan,

Please try to fix the timezone on your system, the series appears
several hours in the future.

On 1/5/23 01:11, Hernan Vargas wrote:
> Upstreaming ACC100 changes for 23.03.
> 
> Hernan Vargas (6):
>    baseband/acc: acc100 use define constant
>    baseband/acc: acc100 use desc helper functions
>    baseband/acc: acc100 free harq layout pointer
>    baseband/acc: acc100 fix iteration counter in TB
>    baseband/acc: acc100 ignore missing mempools
>    baseband/acc: acc100 fix queue mapping to 64 bits

Please reorder the series, so that fixes (that are meant to be
backported) are at the beginning.

>   drivers/baseband/acc/rte_acc100_pmd.c | 61 ++++++++++-----------------
>   1 file changed, 23 insertions(+), 38 deletions(-)
> 

Maxime

RE: [PATCH v1 0/6] baseband/acc: changes for 23.03

[Vargas, Hernan]

Hi Maxime,

I've reordered the commits to put the fixes first. 
My server was still using the wrong time when I sent the v2 series, please let me know if you need me to re-send it.

Thanks,
Hernan

-----Original Message-----
From: Maxime Coquelin <maxime.coquelin@redhat.com> 
Sent: Thursday, January 5, 2023 2:48 AM
To: Vargas, Hernan <hernan.vargas@intel.com>; dev@dpdk.org; gakhil@marvell.com; trix@redhat.com
Cc: Chautru, Nicolas <nicolas.chautru@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
Subject: Re: [PATCH v1 0/6] baseband/acc: changes for 23.03

Hi Hernan,

Please try to fix the timezone on your system, the series appears several hours in the future.

On 1/5/23 01:11, Hernan Vargas wrote:
> Upstreaming ACC100 changes for 23.03.
> 
> Hernan Vargas (6):
>    baseband/acc: acc100 use define constant
>    baseband/acc: acc100 use desc helper functions
>    baseband/acc: acc100 free harq layout pointer
>    baseband/acc: acc100 fix iteration counter in TB
>    baseband/acc: acc100 ignore missing mempools
>    baseband/acc: acc100 fix queue mapping to 64 bits

Please reorder the series, so that fixes (that are meant to be
backported) are at the beginning.

>   drivers/baseband/acc/rte_acc100_pmd.c | 61 ++++++++++-----------------
>   1 file changed, 23 insertions(+), 38 deletions(-)
> 

Maxime

Re: [PATCH v1 0/6] baseband/acc: changes for 23.03

[Maxime Coquelin]

Hi Hernan,

On 1/5/23 22:59, Vargas, Hernan wrote:
> Hi Maxime,
> 
> I've reordered the commits to put the fixes first.
> My server was still using the wrong time when I sent the v2 series, please let me know if you need me to re-send it.

No need to resend, thanks for having fixed it for future series.

Maxime

> Thanks,
> Hernan
> 
> -----Original Message-----
> From: Maxime Coquelin <maxime.coquelin@redhat.com>
> Sent: Thursday, January 5, 2023 2:48 AM
> To: Vargas, Hernan <hernan.vargas@intel.com>; dev@dpdk.org; gakhil@marvell.com; trix@redhat.com
> Cc: Chautru, Nicolas <nicolas.chautru@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: Re: [PATCH v1 0/6] baseband/acc: changes for 23.03
> 
> Hi Hernan,
> 
> Please try to fix the timezone on your system, the series appears several hours in the future.
> 
> On 1/5/23 01:11, Hernan Vargas wrote:
>> Upstreaming ACC100 changes for 23.03.
>>
>> Hernan Vargas (6):
>>     baseband/acc: acc100 use define constant
>>     baseband/acc: acc100 use desc helper functions
>>     baseband/acc: acc100 free harq layout pointer
>>     baseband/acc: acc100 fix iteration counter in TB
>>     baseband/acc: acc100 ignore missing mempools
>>     baseband/acc: acc100 fix queue mapping to 64 bits
> 
> Please reorder the series, so that fixes (that are meant to be
> backported) are at the beginning.
> 
>>    drivers/baseband/acc/rte_acc100_pmd.c | 61 ++++++++++-----------------
>>    1 file changed, 23 insertions(+), 38 deletions(-)
>>
> 
> Maxime
>