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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: ce45dcda-85d0-487b-c912-08d7e684c920 X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Apr 2020 06:17:07.8866 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: aaI26VGe6Rxt6Mpj8r+65eFpsCZ5RgNIYS5/aF6i3QRy7eoFAFULDqPg4Sm2zknDxC3hZjVB1drMXrzyAJXmiA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR18MB3394 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-04-21_10:2020-04-21, 2020-04-21 signatures=0 Subject: Re: [dpdk-dev] [EXT] Re: [PATCH v3 1/1] bus/pci: optimise scanning with whitelist/blacklist X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >-----Original Message----- >From: Ga=EBtan Rivet >Sent: Tuesday, April 21, 2020 8:48 PM >To: Sunil Kumar Kori >Cc: stephen@networkplumber.org; david.marchand@redhat.com; Jerin Jacob >Kollanukkaran ; dev@dpdk.org >Subject: [EXT] Re: [dpdk-dev] [PATCH v3 1/1] bus/pci: optimise scanning wi= th >whitelist/blacklist > >External Email > >---------------------------------------------------------------------- >On 20/04/20 12:25 +0530, Sunil Kumar Kori wrote: >> rte_bus_scan API scans all the available PCI devices irrespective of >> white or black listing parameters then further devices are probed >> based on white or black listing parameters. So unnecessary CPU cycles >> are wasted during rte_pci_scan. >> >> For Octeontx2 platform with core frequency 2.4 Ghz, rte_bus_scan >> consumes around 26ms to scan around 90 PCI devices but all may not be >> used by the application. So for the application which uses 2 NICs, >> rte_bus_scan consumes few microseconds and rest time is saved with this >patch. >> > >Hi Sunil, > >The PCI bus was written at first with the understanding that all PCI devic= es >were scanned and made available on the bus -- the probe will filter afterw= ard. > >Device hotplug and iteration were written with this in mind. Changing this >principle might have unintended consequences in other EAL parts. >I'm not fundamentally against it, but it is not how buses are currently >designed in DPDK. > I am also not sure about this. I would request you provide suggestion to en= sure that there won't be any negative consequences if any. So that I can handle those too. >To me, a one-time 26ms gain is not enough justification to change this >principle. How problematic is this for you? Do you encounter specific issu= es >due to this delay? > >Thanks, Recently we observed this requirement to cater a use of having lowest bootu= p time for DPDK application. One of the use-case for this to reduce the downtime as part of DPDK SW upgr= ade in the field. i.e after the SW update, time to close the application and restart it again for= packet processing. Having this solution application will be up soon and lesser traffic impact = will be there in a deployed system. >-- >Ga=EBtan