From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D45A2A0C56; Wed, 8 Sep 2021 08:36:55 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5D26A4003E; Wed, 8 Sep 2021 08:36:55 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 3998B4003C for ; Wed, 8 Sep 2021 08:36:54 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10100"; a="284108217" X-IronPort-AV: E=Sophos;i="5.85,277,1624345200"; d="scan'208";a="284108217" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2021 23:36:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,277,1624345200"; d="scan'208";a="503422163" Received: from orsmsx605.amr.corp.intel.com ([10.22.229.18]) by fmsmga008.fm.intel.com with ESMTP; 07 Sep 2021 23:36:52 -0700 Received: from orsmsx610.amr.corp.intel.com (10.22.229.23) by ORSMSX605.amr.corp.intel.com (10.22.229.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Tue, 7 Sep 2021 23:36:52 -0700 Received: from orsedg603.ED.cps.intel.com (10.7.248.4) by orsmsx610.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12 via Frontend Transport; Tue, 7 Sep 2021 23:36:52 -0700 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (104.47.58.101) by edgegateway.intel.com (134.134.137.100) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2242.10; Tue, 7 Sep 2021 23:36:52 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=a6PmnJbZKrtFoRr2FjbLzs3bTe36zjBi+vi+7KTD69iHBq6KGSN+x8RfgX/RC2f/V+iBkG1NnKr6OuX8qIxSMYGgCYTVnPCzj43A5eas0ckXT4wyWGGNYTyNy67BVk6xpTEj9669CtzJaM/tLF2gVd4ztvRMgZLyDkeZeA23Ztod0Rb+m4xbAjAGOxzMxQiw/bJdO6tCn/giJgMuTQBWRAzPd6gCqU0Davbj2WC/KWspEZs9k8c6u1YgVoUt8SC9oi55+cMjgR7/DZ7rPIBq1oMKyrymQW/nRA/l5X7u98i+QqhMFHSUnamLN66kO06ifWE0g5F92IDhlZ2zvnGVQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=jHW0twi7RHb2Iswnrm2srCVhhOOEFFHV9PuHu3RuuH0=; b=JIGdwTwM8zCSGgc9j+9TcFlsIt6VlUI+qGvykLnTYKMvRCt5j0Aw+JhAAgKhtMpX0jvIb+/4B+6XMgAndHuLcFdPPwmUXXWeR5UAduRKSVeRjdp5yM5bdJW817thcsuEhcm+KSoxam/kA3aEiGnR92FvhZ5ebz9mEKnuO856yfFJ765J2Rydcum5f56GbVmTqeD3s+NohEyVq5wuM5gj0AjOHNaU0UcA7wY63BWsvpPwNpC1cEtJLKIaNlr8ineJseAXrbTELs2y9rV7SbctOFlTl/rKzJcwl6zAdHlcdnwuA1ri9DUG0fr3OhvTXf6pcj7R5x3X6B5+7Opr0yohNg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jHW0twi7RHb2Iswnrm2srCVhhOOEFFHV9PuHu3RuuH0=; b=j5DU6VfQS2uArfPmdqLB6S/uaVmWQS/bFTFpdP+12P4y05La0w7kd/XAS78VpQdsK6gME4W0wglgqFGaeEtnHzaemvDOoZavuvVWmeqnTDESBE43gN/NkaGjUieEwq7OjN++LmSvDuONuq9s6vsvJotoWxiskbx4nQtZvGd7uqg= Received: from BYAPR11MB2901.namprd11.prod.outlook.com (2603:10b6:a03:91::23) by SJ0PR11MB4815.namprd11.prod.outlook.com (2603:10b6:a03:2dd::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4500.14; Wed, 8 Sep 2021 06:36:51 +0000 Received: from BYAPR11MB2901.namprd11.prod.outlook.com ([fe80::954c:3fe0:a7af:7c96]) by BYAPR11MB2901.namprd11.prod.outlook.com ([fe80::954c:3fe0:a7af:7c96%3]) with mapi id 15.20.4500.015; Wed, 8 Sep 2021 06:36:51 +0000 From: "Xu, Rosen" To: "Xu, Rosen" , Akhil Goyal , "dev@dpdk.org" CC: "anoobj@marvell.com" , "Nicolau, Radu" , "Doherty, Declan" , "hemant.agrawal@nxp.com" , "matan@nvidia.com" , "Ananyev, Konstantin" , "thomas@monjalon.net" , "adwivedi@marvell.com" , "Yigit, Ferruh" , "andrew.rybchenko@oktetlabs.ru" , "Xu, Rosen" Thread-Topic: [dpdk-dev] [PATCH] RFC: ethdev: add reassembly offload Thread-Index: AQHXmAYjbm2O6B2tG0qOtxkgOvDhw6uZxOLwgAACwkA= Date: Wed, 8 Sep 2021 06:36:50 +0000 Message-ID: References: <20210823100259.1619886-1-gakhil@marvell.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.5.1.3 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYmQ1MDU5ZTEtZjZlMy00ZjgyLTk0ODQtNDA4ZTJkMmQ1OTdlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUmkwSGhFbURLMm16aEsyNzFiUXZEYUdpWm5HZGtZRHhKNUVYcTYzajlMaTEwWlEyaDY1aHlFWjVxYzR2N3lwbiJ9 x-ctpclassification: CTP_NT authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: f5732963-ea9f-4f6c-f9d9-08d972930a68 x-ms-traffictypediagnostic: SJ0PR11MB4815: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:9508; x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: sX5yIGYYrTrYJzpULeXCPJEf9Op5o+M9H5FTrHLb1dUoCrk+9LVp8kGCPgYXHFkDkseEcETKLCwlfxgGbi3ceXyF4YnRQVZK8NWIt1APpAcvs8npXdg3XanbvprSkrKgZ3/eEEL+GyXVogsp9pPpkCMAiEm/tfhnHUyUcUs2X6d/QYYpXf/xxtQm0ja9tXe7J6c0YR2IBfLdqOJ297hPN9RH9oW3H5k63cP0dzllcpy+tA2LXyZdPwmiYYelr3n+8YS6DSUJTBFzIeLJZnLIy8WKZHsfRkQ/rNQLlpNgPK4l7c8+YV0dZNZcrAy1xHyE4M+1qq6KzrEQg3yBjb+ZG9mLtykGArqcKHrKZMlht4Q9wcGsyHAQb/yjJTbwfb3D9yU1CjTnwCu5f7pAXpTqQhDoHnJROJr/fsd81eLQutzVuQBIfrXVwuu3OUaZ0lRS0EpXbA3Q37P5EOrL4AKv+IcGR5A3j3NWkXzOtraBSpUcwnI6HWt4fT/KPI1hhxQKLwgtSorFfE2hWv8v/epXUm8cpgv5zluzJrv388yDeglL3yNkJCo5MZyt5zgv6wGH61XxaWMkmro9iWI/70Znqn81qP9kfHHxPJXnY1ufbRWsvAjyHJSKwfN4isMnqhEIhXTIpEq32fMzbCMRaLF/LDhTkIxJ7WoQ+LoxuEhX1FTWhkgNRATEtP1W9kK72vTu9N0y9QoEbrDfAhqAq62eSA== x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:BYAPR11MB2901.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(396003)(376002)(346002)(39860400002)(136003)(186003)(107886003)(7696005)(9686003)(54906003)(33656002)(52536014)(71200400001)(66476007)(6506007)(5660300002)(76116006)(8936002)(8676002)(38100700002)(66446008)(53546011)(26005)(66946007)(4326008)(66556008)(64756008)(86362001)(2940100002)(2906002)(316002)(122000001)(478600001)(110136005)(38070700005)(55016002)(83380400001); DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?MCm1JUfoA26zYrWnux8afqJ00FVHLAG0XS/WPQ30toH7M+oL8zDBy7ltmoM0?= =?us-ascii?Q?eB5VKw+tbW09k/f5mrLOUIZc9bmbYMgJC0tjsTx/mnB7y0+CMFpiem3inovd?= =?us-ascii?Q?by/Tt2vaY640BOZ3LRdTuIAGsc1QN+baDaMMCbfZKEF17o5WeIAh6tbhV5Jl?= =?us-ascii?Q?ZPC5aKb4uW2vgtEm8yBB20EnJ9MUa/PQ4XpKGkyf3+3vdH6h05bYFVCppem4?= =?us-ascii?Q?UbqWfilyOJlqr23QoAz/cgRhHrZC45xtdOkBAQimqIIfqkH/3i1rylDRONVl?= =?us-ascii?Q?gCuFBx7b5JfPdKEM0g78JnLh+hJx8U8yfJFbjL3PgpRc0Of4FYkYYEJdLwRh?= =?us-ascii?Q?eX8mwSblaU9nMF4IcO2/OfdHl53Tm0hbs+99lEtJdPZ4dYTSXgy91knkXaxG?= =?us-ascii?Q?S9X3mDkb3H1sBK21Xzvk0I7xKK9qQh2kegIoBEG0N5n1vHDYswyVe6XmlVO1?= =?us-ascii?Q?OmDGmxQ+KuBScw1TvLdaU8Gj3yAUsnwu1XNpB/wMgMHmGGw2DGUvotJsKq8A?= =?us-ascii?Q?/NNsINAdr648ytg7pnMw9kDgfTIUvxJtKgiIbFZk2rthG/jk4Zr0OAtfjrvy?= =?us-ascii?Q?2kp/AAs3wTgKrIcGGVRCE1nxuLVep/sWYPNg4ZKiYLg2vipPk7SslwEFqvkQ?= =?us-ascii?Q?gEi5+v4DZ/Nn7q0x9yeMowMqyX5IKDPrUZdeujdM+uzlCC30ebBg010i9Dk1?= =?us-ascii?Q?qvqBN6/kW6VbCN1gBY7JeKdsA8D6fhqsevrcPWju90ZaDpH7JmtG1PUVVYye?= =?us-ascii?Q?JFLpeDUC+g3VeHnZjd73lprSKdZgn1lTncbsgElso5qNn40viCID3SmFlfpU?= =?us-ascii?Q?LguzRGXYtHAz1+rfUOajKj9pq2MeazvhfaY8lSc6QrLt+XQPqdZPAC5R/42l?= =?us-ascii?Q?IK4NflzXolZq8qjaLFfaGhPLvJqoafPtxST4TAxvgi4Ow/LpaeqSuihyAUFh?= =?us-ascii?Q?I27Segs2UzcmG41Qbc5FnB4PZcPwC31fVx7IJxqu6kD19Y2B6XIoEGyrn0vp?= =?us-ascii?Q?nWHbY74ihgpnvoHe3mHn19LzwFOMAid06ROS5mqjlYQhkHtrvMc/LzjOebhi?= =?us-ascii?Q?QfxDCtuPR0c7N8nCwbIqD+k4D8dsNw2y1TI9pkZEBOardjrcHWqb7m9k/TR4?= =?us-ascii?Q?/sCeAzlE116BBZzz+ep6zBApGwLY+eSiEVEEpn9yRZ6BEdmoVvnAI0rU3Ktw?= =?us-ascii?Q?w5W0KzYt5Ew+F2B6oAFKKxIZFr6EWnNU5U4uOQfaLYKJWvfzu2cbF1sIl0uu?= =?us-ascii?Q?J/lBg+YkUANFxti8Q+DhkA0pzbeHoIth28BYxh8Xpb/O+IIwN0uhcxhOf128?= =?us-ascii?Q?Vz10kcZoj6e8ar/cSR6zwuTa?= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB2901.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f5732963-ea9f-4f6c-f9d9-08d972930a68 X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Sep 2021 06:36:50.7987 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: nW7VHyV11tNID2y8bcbrjLdHxbLImpXCQGINTsOWzzqe5bxpyiqTYeRpwSB6rnCVm/zsbdTO+uWBQzaz3XgIHA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR11MB4815 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH] RFC: ethdev: add reassembly offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Cc myself > -----Original Message----- > From: dev On Behalf Of Xu, Rosen > Sent: Wednesday, September 08, 2021 14:34 > To: Akhil Goyal ; dev@dpdk.org > Cc: anoobj@marvell.com; Nicolau, Radu ; Doherty, > Declan ; hemant.agrawal@nxp.com; > matan@nvidia.com; Ananyev, Konstantin ; > thomas@monjalon.net; adwivedi@marvell.com; Yigit, Ferruh > ; andrew.rybchenko@oktetlabs.ru > Subject: Re: [dpdk-dev] [PATCH] RFC: ethdev: add reassembly offload >=20 > Hi, >=20 > > -----Original Message----- > > From: dev On Behalf Of Akhil Goyal > > Sent: Monday, August 23, 2021 18:03 > > To: dev@dpdk.org > > Cc: anoobj@marvell.com; Nicolau, Radu ; > > Doherty, Declan ; hemant.agrawal@nxp.com; > > matan@nvidia.com; Ananyev, Konstantin > ; > > thomas@monjalon.net; adwivedi@marvell.com; Yigit, Ferruh > > ; andrew.rybchenko@oktetlabs.ru; Akhil Goyal > > > > Subject: [dpdk-dev] [PATCH] RFC: ethdev: add reassembly offload > > > > Reassembly is a costly operation if it is done in software, however, > > if it is offloaded to HW, it can considerably save application cycles. > > The operation becomes even more costlier if IP fragmants are encrypted. > > > > To resolve above two issues, a new offload > DEV_RX_OFFLOAD_REASSEMBLY > > is introduced in ethdev for devices which can attempt reassembly of > > packets in hardware. > > rte_eth_dev_info is added with the reassembly capabilities which a > > device can support. > > Now, if IP fragments are encrypted, reassembly can also be attempted > > while doing inline IPsec processing. > > This is controlled by a flag in rte_security_ipsec_sa_options to > > enable reassembly of encrypted IP fragments in the inline path. > > > > The resulting reassembled packet would be a typical segmented mbuf in > > case of success. > > > > And if reassembly of fragments is failed or is incomplete (if > > fragments do not come before the reass_timeout), the mbuf is updated > > with an ol_flag PKT_RX_REASSEMBLY_INCOMPLETE and mbuf is returned > as > > is. Now application may decide the fate of the packet to wait more for > > fragments to come or drop. > > > > Signed-off-by: Akhil Goyal > > --- > > lib/ethdev/rte_ethdev.c | 1 + > > lib/ethdev/rte_ethdev.h | 18 +++++++++++++++++- > > lib/mbuf/rte_mbuf_core.h | 3 ++- > > lib/security/rte_security.h | 10 ++++++++++ > > 4 files changed, 30 insertions(+), 2 deletions(-) > > > > diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index > > 9d95cd11e1..1ab3a093cf 100644 > > --- a/lib/ethdev/rte_ethdev.c > > +++ b/lib/ethdev/rte_ethdev.c > > @@ -119,6 +119,7 @@ static const struct { > > RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER), > > RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND), > > RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME), > > + RTE_RX_OFFLOAD_BIT2STR(REASSEMBLY), > > RTE_RX_OFFLOAD_BIT2STR(SCATTER), > > RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP), > > RTE_RX_OFFLOAD_BIT2STR(SECURITY), > > diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index > > d2b27c351f..e89a4dc1eb 100644 > > --- a/lib/ethdev/rte_ethdev.h > > +++ b/lib/ethdev/rte_ethdev.h > > @@ -1360,6 +1360,7 @@ struct rte_eth_conf { > > #define DEV_RX_OFFLOAD_VLAN_FILTER 0x00000200 > > #define DEV_RX_OFFLOAD_VLAN_EXTEND 0x00000400 > > #define DEV_RX_OFFLOAD_JUMBO_FRAME 0x00000800 > > +#define DEV_RX_OFFLOAD_REASSEMBLY 0x00001000 > > #define DEV_RX_OFFLOAD_SCATTER 0x00002000 > > /** > > * Timestamp is set by the driver in > > RTE_MBUF_DYNFIELD_TIMESTAMP_NAME @@ -1477,6 +1478,20 @@ > struct > > rte_eth_dev_portconf { > > */ > > #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID > > (UINT16_MAX) > > > > +/** > > + * Reassembly capabilities that a device can support. > > + * The device which can support reassembly offload should set > > + * DEV_RX_OFFLOAD_REASSEMBLY > > + */ > > +struct rte_eth_reass_capa { > > + /** Maximum time in ns that a fragment can wait for further > > fragments */ > > + uint64_t reass_timeout; > > + /** Maximum number of fragments that device can reassemble */ > > + uint16_t max_frags; > > + /** Reserved for future capabilities */ > > + uint16_t reserved[3]; > > +}; >=20 > IP reassembly occurs at the final recipient of the message, NIC attempts = to > do it has a fer challenges. The reason is that having NICs need to worry = about > reassembling fragments would increase their complexity, so most likely it > only can handle range length of datagrams. Seems rte_eth_reass_capa miss > the max original datagrams length which NIC can support, this features is > better to be negotiated between NIC and SW as well. >=20 > > /** > > * Ethernet device associated switch information > > */ > > @@ -1582,8 +1597,9 @@ struct rte_eth_dev_info { > > * embedded managed interconnect/switch. > > */ > > struct rte_eth_switch_info switch_info; > > + /* Reassembly capabilities of a device for reassembly offload */ > > + struct rte_eth_reass_capa reass_capa; > > > > - uint64_t reserved_64s[2]; /**< Reserved for future fields */ > > void *reserved_ptrs[2]; /**< Reserved for future fields */ > > }; > > > > diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h index > > bb38d7f581..cea25c87f7 100644 > > --- a/lib/mbuf/rte_mbuf_core.h > > +++ b/lib/mbuf/rte_mbuf_core.h > > @@ -200,10 +200,11 @@ extern "C" { > > #define PKT_RX_OUTER_L4_CKSUM_BAD (1ULL << 21) > > #define PKT_RX_OUTER_L4_CKSUM_GOOD (1ULL << 22) > > #define PKT_RX_OUTER_L4_CKSUM_INVALID ((1ULL << 21) | (1ULL > << 22)) > > +#define PKT_RX_REASSEMBLY_INCOMPLETE (1ULL << 23) > > > > /* add new RX flags here, don't forget to update PKT_FIRST_FREE */ > > > > -#define PKT_FIRST_FREE (1ULL << 23) > > +#define PKT_FIRST_FREE (1ULL << 24) > > #define PKT_LAST_FREE (1ULL << 40) > > > > /* add new TX flags here, don't forget to update PKT_LAST_FREE */ > > diff --git a/lib/security/rte_security.h b/lib/security/rte_security.h > > index > > 88d31de0a6..364eeb5cd4 100644 > > --- a/lib/security/rte_security.h > > +++ b/lib/security/rte_security.h > > @@ -181,6 +181,16 @@ struct rte_security_ipsec_sa_options { > > * * 0: Disable per session security statistics collection for this S= A. > > */ > > uint32_t stats : 1; > > + > > + /** Enable reassembly on incoming packets. > > + * > > + * * 1: Enable driver to try reassembly of encrypted IP packets for > > + * this SA, if supported by the driver. This feature will work > > + * only if rx_offload DEV_RX_OFFLOAD_REASSEMBLY is set in > > + * inline ethernet device. > > + * * 0: Disable reassembly of packets (default). > > + */ > > + uint32_t reass_en : 1; > > }; > > > > /** IPSec security association direction */ > > -- > > 2.25.1