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Tue, 28 Jan 2020 08:57:21 +0000 Received: from BYAPR11MB3093.namprd11.prod.outlook.com ([fe80::998:6492:ab89:f531]) by BYAPR11MB3093.namprd11.prod.outlook.com ([fe80::998:6492:ab89:f531%4]) with mapi id 15.20.2665.026; Tue, 28 Jan 2020 08:57:21 +0000 From: "Konieczny, TomaszX" To: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2] net/ixgbe: fix flow ctrl mode setting Thread-Index: AdXVuO+ButSB48bXS/OUMHWBWeMjlg== Date: Tue, 28 Jan 2020 08:57:20 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.2.0.6 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: spf=none (sender IP is ) smtp.mailfrom=tomaszx.konieczny@intel.com; x-originating-ip: [134.191.221.74] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: fa0af541-d638-41ce-0937-08d7a3d015ca x-ms-traffictypediagnostic: BYAPR11MB2533: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:2150; x-forefront-prvs: 029651C7A1 x-forefront-antispam-report: SFV:NSPM; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: fa0af541-d638-41ce-0937-08d7a3d015ca X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Jan 2020 08:57:20.7843 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: TB72fT4JJPv22C5fJfTvmNnmSZkmTMXaGSVMV6pBEm+HKLbdnaS/Crxn+XpRoazlxbqfMG/x95b9h6k6At2KTFKtCBUtj6e48iQLfNyqBWM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB2533 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v2] net/ixgbe: fix flow ctrl mode setting X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Patch fixes reported issue. Tested-by: Tomasz Konieczny Regards Tomasz Konieczny --------------------------------------------------------------------- Intel Corporation (UK) Ltd. Co. Reg. #1134945 Pipers Way, Swindon SN3 1RJ >Date: Thu, 19 Dec 2019 10:17:58 +0000 >From: Guinan Sun >To: dev@dpdk.org >Cc: Wenzhuo Lu , Qiming Yang > , Qi Zhang , Guinan Sun > , stable@dpdk.org >Subject: [dpdk-dev] [PATCH v2] net/ixgbe: fix flow ctrl mode setting >Message-ID: <20191219101758.24608-1-guinanx.sun@intel.com> > >When the port starts, the hw register is reset first, >and then the required parameters are set again. >If the parameters to be used are not set after resetting the register, >a read register error will occur. This patch is used to fix the problem. > >Fixes: af75078fece3 ("first public release") >Cc: stable@dpdk.org > >Signed-off-by: Guinan Sun >--- >v2: changes >* Modify the initial value of requested_mode and current_mode >--- > drivers/net/ixgbe/ixgbe_ethdev.c | 24 ++++++++++++++++++++++-- > drivers/net/ixgbe/ixgbe_ethdev.h | 1 + > 2 files changed, 23 insertions(+), 2 deletions(-) > >diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_et= hdev.c >index 2c6fd0f13..573117e3a 100644 >--- a/drivers/net/ixgbe/ixgbe_ethdev.c >+++ b/drivers/net/ixgbe/ixgbe_ethdev.c >@@ -1170,8 +1170,8 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev, void >*init_params __rte_unused) > memset(dcb_config, 0, sizeof(struct ixgbe_dcb_config)); > ixgbe_dcb_init(hw, dcb_config); > /* Get Hardware Flow Control setting */ >- hw->fc.requested_mode =3D ixgbe_fc_full; >- hw->fc.current_mode =3D ixgbe_fc_full; >+ hw->fc.requested_mode =3D ixgbe_fc_none; >+ hw->fc.current_mode =3D ixgbe_fc_none; > hw->fc.pause_time =3D IXGBE_FC_PAUSE; > for (i =3D 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { > hw->fc.low_water[i] =3D IXGBE_FC_LO; >@@ -2539,6 +2539,7 @@ ixgbe_dev_start(struct rte_eth_dev *dev) > { > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); >+ struct ixgbe_adapter *adapter =3D dev->data->dev_private; > struct ixgbe_vf_info *vfinfo =3D > *IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private); > struct rte_pci_device *pci_dev =3D RTE_ETH_DEV_TO_PCI(dev); >@@ -2555,6 +2556,7 @@ ixgbe_dev_start(struct rte_eth_dev *dev) > IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private); > struct ixgbe_macsec_setting *macsec_setting =3D > IXGBE_DEV_PRIVATE_TO_MACSEC_SETTING(dev->data- >>dev_private); >+ uint32_t mflcn; > > PMD_INIT_FUNC_TRACE(); > >@@ -2665,6 +2667,20 @@ ixgbe_dev_start(struct rte_eth_dev *dev) > } > > ixgbe_restore_statistics_mapping(dev); >+ err =3D ixgbe_fc_enable(hw); >+ if ((err =3D=3D IXGBE_SUCCESS) || (err =3D=3D >IXGBE_ERR_FC_NOT_NEGOTIATED)) { >+ >+ mflcn =3D IXGBE_READ_REG(hw, IXGBE_MFLCN); >+ >+ /* set or clear MFLCN.PMCF bit depending on configuration */ >+ if (adapter->mac_ctrl_frame_fwd !=3D 0) >+ mflcn |=3D IXGBE_MFLCN_PMCF; >+ else >+ mflcn &=3D ~IXGBE_MFLCN_PMCF; >+ >+ IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn); >+ IXGBE_WRITE_FLUSH(hw); >+ } > > err =3D ixgbe_dev_rxtx_start(dev); > if (err < 0) { >@@ -2893,6 +2909,8 @@ ixgbe_dev_stop(struct rte_eth_dev *dev) > > adapter->rss_reta_updated =3D 0; > >+ adapter->mac_ctrl_frame_fwd =3D 0; >+ > hw->adapter_stopped =3D true; > } > >@@ -4646,6 +4664,7 @@ static int > ixgbe_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_c= onf) > { > struct ixgbe_hw *hw; >+ struct ixgbe_adapter *adapter =3D dev->data->dev_private; > int err; > uint32_t rx_buf_size; > uint32_t max_high_water; >@@ -4682,6 +4701,7 @@ ixgbe_flow_ctrl_set(struct rte_eth_dev *dev, struct >rte_eth_fc_conf *fc_conf) > hw->fc.low_water[0] =3D fc_conf->low_water; > hw->fc.send_xon =3D fc_conf->send_xon; > hw->fc.disable_fc_autoneg =3D !fc_conf->autoneg; >+ adapter->mac_ctrl_frame_fwd =3D fc_conf->mac_ctrl_frame_fwd; > > err =3D ixgbe_fc_enable(hw); > >diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_et= hdev.h >index 76a1b9d18..5af584f9e 100644 >--- a/drivers/net/ixgbe/ixgbe_ethdev.h >+++ b/drivers/net/ixgbe/ixgbe_ethdev.h >@@ -510,6 +510,7 @@ struct ixgbe_adapter { > * mailbox status) link status. > */ > uint8_t pflink_fullchk; >+ uint8_t mac_ctrl_frame_fwd; > }; > > struct ixgbe_vf_representor { >-- >2.17.1