* [PATCH v5 1/2] bus/pci: add function to enable/disable PASID
2023-11-03 17:52 [PATCH v5 0/2] *** Disable PASID for DLB Device *** Abdullah Sevincer
@ 2023-11-03 17:52 ` Abdullah Sevincer
2023-11-03 18:02 ` Jerin Jacob
2023-11-03 17:52 ` [PATCH v5 2/2] event/dlb2: fix disable PASID Abdullah Sevincer
1 sibling, 1 reply; 5+ messages in thread
From: Abdullah Sevincer @ 2023-11-03 17:52 UTC (permalink / raw)
To: dev; +Cc: jerinj, mike.ximing.chen, bruce.richardson, thomas, Abdullah Sevincer
This commit implements an internal api to enable and disable PASID for
a device e.g. device driver event/dlb2.
For kernels when PASID enabled by default it breaks DLB functionality,
hence disabling PASID is required for DLB to function properly.
PASID capability is not exposed to users hence offset can not be
retrieved by rte_pci_find_ext_capability() api. Therefore, api
implemented in this commit accepts an offset for PASID with an enable
flag which is used to enable/disable PASID.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
---
drivers/bus/pci/pci_common.c | 7 +++++++
drivers/bus/pci/rte_bus_pci.h | 13 +++++++++++++
drivers/bus/pci/version.map | 1 +
lib/pci/rte_pci.h | 5 +++++
4 files changed, 26 insertions(+)
diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c
index 921d957bf6..ced072825e 100644
--- a/drivers/bus/pci/pci_common.c
+++ b/drivers/bus/pci/pci_common.c
@@ -938,6 +938,13 @@ rte_pci_set_bus_master(const struct rte_pci_device *dev, bool enable)
return 0;
}
+int
+rte_pci_set_pasid(const struct rte_pci_device *dev, off_t offset, bool enable)
+{
+ uint16_t pasid = enable;
+ return rte_pci_write_config(dev, &pasid, sizeof(pasid), offset) < 0 ? -1 : 0;
+}
+
struct rte_pci_bus rte_pci_bus = {
.bus = {
.scan = rte_pci_scan,
diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h
index 21e234abf0..2542300d2f 100644
--- a/drivers/bus/pci/rte_bus_pci.h
+++ b/drivers/bus/pci/rte_bus_pci.h
@@ -295,6 +295,19 @@ void rte_pci_ioport_read(struct rte_pci_ioport *p,
void rte_pci_ioport_write(struct rte_pci_ioport *p,
const void *data, size_t len, off_t offset);
+/**
+ * Enable/Disable PASID.
+ *
+ * @param dev
+ * A pointer to a rte_pci_device structure.
+ * @param offset
+ * Offset of the PASID external capability.
+ * @param enable
+ * Flag to enable or disable PASID.
+ */
+__rte_internal
+int rte_pci_set_pasid(const struct rte_pci_device *dev, off_t offset, bool enable);
+
#ifdef __cplusplus
}
#endif
diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map
index 74c5b075d5..347b9010e9 100644
--- a/drivers/bus/pci/version.map
+++ b/drivers/bus/pci/version.map
@@ -37,5 +37,6 @@ INTERNAL {
rte_pci_get_sysfs_path;
rte_pci_register;
+ rte_pci_set_pasid;
rte_pci_unregister;
};
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index 69e932d910..772a8d5622 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -101,6 +101,11 @@ extern "C" {
#define RTE_PCI_EXT_CAP_ID_ACS 0x0d /* Access Control Services */
#define RTE_PCI_EXT_CAP_ID_SRIOV 0x10 /* SR-IOV */
#define RTE_PCI_EXT_CAP_ID_PRI 0x13 /* Page Request Interface */
+#define RTE_PCI_EXT_CAP_ID_PASID 0x1B /* Process Address Space ID */
+
+/* Process Address Space ID */
+#define RTE_PCI_PASID_CTRL 0x06 /* PASID control register */
+#define RTE_PCI_PASID_CAP_OFFSET 0x148 /* PASID capability offset */
/* Advanced Error Reporting (RTE_PCI_EXT_CAP_ID_ERR) */
#define RTE_PCI_ERR_UNCOR_STATUS 0x04 /* Uncorrectable Error Status */
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v5 2/2] event/dlb2: fix disable PASID
2023-11-03 17:52 [PATCH v5 0/2] *** Disable PASID for DLB Device *** Abdullah Sevincer
2023-11-03 17:52 ` [PATCH v5 1/2] bus/pci: add function to enable/disable PASID Abdullah Sevincer
@ 2023-11-03 17:52 ` Abdullah Sevincer
1 sibling, 0 replies; 5+ messages in thread
From: Abdullah Sevincer @ 2023-11-03 17:52 UTC (permalink / raw)
To: dev
Cc: jerinj, mike.ximing.chen, bruce.richardson, thomas,
Abdullah Sevincer, stable
In vfio-pci driver when PASID is enabled by default DLB hardware puts
DLB in SIOV mode. This breaks DLB PF-PMD mode. For DLB PF-PMD mode to
function properly PASID needs to be disabled.
In this commit this issue is addressed and PASID is disabled by writing
a zero to PASID control register.
Fixes: 5433956d5185 ("event/dlb2: add eventdev probe")
Cc: stable@dpdk.org
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
---
drivers/event/dlb2/pf/dlb2_main.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c
index aa03e4c311..843fe215aa 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -514,6 +514,16 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
}
}
+ /* Disable PASID if it is enabled by default, which
+ * breaks the DLB if enabled.
+ */
+ off = RTE_PCI_PASID_CAP_OFFSET + RTE_PCI_PASID_CTRL;
+ if (rte_pci_set_pasid(pdev, off, false)) {
+ DLB2_LOG_ERR("[%s()] failed to write the pcie config space at offset %d\n",
+ __func__, (int)off);
+ return -1;
+ }
+
return 0;
}
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread