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Tue, 14 Apr 2020 18:29:38 +0000 Received: from BYAPR11MB3301.namprd11.prod.outlook.com ([fe80::f8cb:58cd:e958:fff4]) by BYAPR11MB3301.namprd11.prod.outlook.com ([fe80::f8cb:58cd:e958:fff4%6]) with mapi id 15.20.2900.028; Tue, 14 Apr 2020 18:29:38 +0000 From: "Ananyev, Konstantin" To: Honnappa Nagarahalli , "dev@dpdk.org" CC: "david.marchand@redhat.com" , "jielong.zjl@antfin.com" , nd , nd Thread-Topic: [PATCH v3 9/9] ring: add C11 memory model for new sync modes Thread-Index: AQHWCd93VYpM5k5NKEiYni6AJ1o026h4FqUAgADop9A= Date: Tue, 14 Apr 2020 18:29:38 +0000 Message-ID: References: <20200402220959.29885-1-konstantin.ananyev@intel.com> <20200403174235.23308-1-konstantin.ananyev@intel.com> <20200403174235.23308-10-konstantin.ananyev@intel.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.2.0.6 authentication-results: spf=none (sender IP is ) smtp.mailfrom=konstantin.ananyev@intel.com; x-originating-ip: [192.198.151.172] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 1a5de1bc-52d2-4ef2-fa10-08d7e0a1ca1e x-ms-traffictypediagnostic: BYAPR11MB3062: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; x-forefront-prvs: 0373D94D15 x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:BYAPR11MB3301.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(10019020)(39850400004)(396003)(346002)(136003)(366004)(376002)(26005)(6506007)(2906002)(186003)(71200400001)(8676002)(81156014)(52536014)(55016002)(33656002)(316002)(478600001)(76116006)(4326008)(5660300002)(66476007)(66556008)(9686003)(54906003)(66446008)(86362001)(110136005)(7696005)(66946007)(8936002)(64756008); DIR:OUT; SFP:1102; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: F8ICmHhCtpZrWA+STOJGC2KSM7sIhJCMfJZ8mhfBdwvYuwlG0lCSwYB7SDA3tO5RDo507fLV2+VQAzLIIma+4/Sqjg5/dMjdafgAwWw8iNn80TQcNgqhadxWy4LBPkD+sxNrXVsMVXeKEOp7T0HmD0R3hyA+DBk5v5fGfNmX2AAKEvwhLDG8IusScitivZBcWALXJZ1J2QHDuogW9mQNzUXUmLcU0UuiwUW2EhMzk3lPaKVm//JLFT5DR2Qrru5C0PlQSp++SR5fXVh5HC/HSjsSoxnOZamsqgO5H6wKHIjf7sou0+5GqhthlAVZk6A8MCQ+JWYQ8rnFpzmWlR+6Iza53TK0Dz8iOH7Prk1p2sW7S/oGqPam2Ylas4WrJOkVbZ4a7sUdSOBfQPmExCfONSl+W0KKT2pFB9zcPLiQ5rAwqdZCSHD42EZo4kGbY/Om x-ms-exchange-antispam-messagedata: ic+GmgFI6BHVwwq1eQnRN2UAth5n1+5uzWr/zlagJvZa1riVA9L1aWQA0Nx5BPuWjlSFB0Qp9vWdatmokoVseS08YKqEjghDZL+iuAIWNf5i7hahFQ8pM4ddrtJiSgzjwglxBKzOMEZfzhrbvPimCQ== x-ms-exchange-transport-forked: True Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 1a5de1bc-52d2-4ef2-fa10-08d7e0a1ca1e X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Apr 2020 18:29:38.0679 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 6ldvnry53Qb/f6Tslm1DSnoDvrJb8w5gqP2jHpywA0bt3btfsKp4G4tvmtbKkZKvnQJAg4BHvHTdhItiWTa5bWEvpVPFZ+4EA83qXoTqNXk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3062 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v3 9/9] ring: add C11 memory model for new sync modes X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > >=20 > > /** > > * @internal Enqueue several objects on the RTS ring. > > diff --git a/lib/librte_ring/rte_ring_rts_c11_mem.h > > b/lib/librte_ring/rte_ring_rts_c11_mem.h > > new file mode 100644 > > index 000000000..b72901497 > > --- /dev/null > > +++ b/lib/librte_ring/rte_ring_rts_c11_mem.h > > @@ -0,0 +1,198 @@ > > +/* SPDX-License-Identifier: BSD-3-Clause > > + * > > + * Copyright (c) 2010-2017 Intel Corporation > > + * Copyright (c) 2007-2009 Kip Macy kmacy@freebsd.org > > + * All rights reserved. > > + * Derived from FreeBSD's bufring.h > > + * Used as BSD-3 Licensed with permission from Kip Macy. > > + */ > > + > > +#ifndef _RTE_RING_RTS_C11_MEM_H_ > > +#define _RTE_RING_RTS_C11_MEM_H_ > > + > > +/** > > + * @file rte_ring_rts_c11_mem.h > > + * It is not recommended to include this file directly, > > + * include instead. > > + * Contains internal helper functions for Relaxed Tail Sync (RTS) ring= mode. > > + * For more information please refer to . > > + */ > > + > > +/** > > + * @internal This function updates tail values. > > + */ > > +static __rte_always_inline void > > +__rte_ring_rts_update_tail(struct rte_ring_rts_headtail *ht) { > > + union rte_ring_ht_poscnt h, ot, nt; > > + > > + /* > > + * If there are other enqueues/dequeues in progress that > > + * might preceded us, then don't update tail with new value. > > + */ > > + > > + ot.raw =3D __atomic_load_n(&ht->tail.raw, __ATOMIC_ACQUIRE); > This can be RELAXED. This thread is reading the value that it updated ear= lier, so it should be able to see the value it updated. It serves as a hoist barrier, to make sure that we read tail before head (s= ee below). =20 > > + > > + do { > > + /* on 32-bit systems we have to do atomic read here */ > > + h.raw =3D __atomic_load_n(&ht->head.raw, > > __ATOMIC_RELAXED); > > + > > + nt.raw =3D ot.raw; > > + if (++nt.val.cnt =3D=3D h.val.cnt) > > + nt.val.pos =3D h.val.pos; > > + > > + } while (__atomic_compare_exchange_n(&ht->tail.raw, &ot.raw, > > nt.raw, > > + 0, __ATOMIC_RELEASE, __ATOMIC_ACQUIRE) =3D=3D 0); } > > + > > +/** > > + * @internal This function waits till head/tail distance wouldn't > > + * exceed pre-defined max value. > > + */ > > +static __rte_always_inline void > > +__rte_ring_rts_head_wait(const struct rte_ring_rts_headtail *ht, > > + union rte_ring_ht_poscnt *h) > > +{ > > + uint32_t max; > > + > > + max =3D ht->htd_max; > > + h->raw =3D __atomic_load_n(&ht->head.raw, __ATOMIC_ACQUIRE); > > + > > + while (h->val.pos - ht->tail.val.pos > max) { > > + rte_pause(); > > + h->raw =3D __atomic_load_n(&ht->head.raw, > > __ATOMIC_ACQUIRE); > > + } > > +} > > +