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Thu, 15 Oct 2020 16:43:12 +0000 From: "Ananyev, Konstantin" To: "Burakov, Anatoly" , "dev@dpdk.org" CC: "Ma, Liang J" , Jan Viktorin , Ruifeng Wang , "David Christensen" , "Richardson, Bruce" , "Hunt, David" , "jerinjacobk@gmail.com" , "thomas@monjalon.net" , "McDaniel, Timothy" , "Eads, Gage" , "Macnamara, Chris" Thread-Topic: [PATCH v7 02/10] eal: add power management intrinsics Thread-Index: AQHWoutbh1UenvEhME+MzDl9WKxJO6mY3l3Q Date: Thu, 15 Oct 2020 16:43:11 +0000 Message-ID: References: <7d5724730715ccfbf55baceae42b91a2351020f8.1602763439.git.anatoly.burakov@intel.com> In-Reply-To: <7d5724730715ccfbf55baceae42b91a2351020f8.1602763439.git.anatoly.burakov@intel.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [46.7.39.127] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b7f2c3f5-8ad6-4bad-17fa-08d8712967b3 x-ms-traffictypediagnostic: SJ0PR11MB4845: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:6430; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB3301.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b7f2c3f5-8ad6-4bad-17fa-08d8712967b3 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Oct 2020 16:43:11.8694 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: NKZ118IAxO1hmV8Z5OJBVfncn9YojsoDSDuJXX1xwWRHIqg/c6RX05FwXoIubGuNv3JVcCtFbhAe78erD/HlPU4A2718aaDXCPssbe3PMbc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR11MB4845 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v7 02/10] eal: add power management intrinsics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > Add two new power management intrinsics, and provide an implementation > in eal/x86 based on UMONITOR/UMWAIT instructions. The instructions > are implemented as raw byte opcodes because there is not yet widespread > compiler support for these instructions. >=20 > The power management instructions provide an architecture-specific > function to either wait until a specified TSC timestamp is reached, or > optionally wait until either a TSC timestamp is reached or a memory > location is written to. The monitor function also provides an optional > comparison, to avoid sleeping when the expected write has already > happened, and no more writes are expected. >=20 > For more details, please refer to Intel(R) 64 and IA-32 Architectures > Software Developer's Manual, Volume 2. >=20 > Signed-off-by: Liang Ma > Signed-off-by: Anatoly Burakov > Acked-by: David Christensen > --- >=20 Acked-by: Konstantin Ananyev > 2.17.1