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Sun, 6 Sep 2020 22:01:47 +0000 Received: from BYAPR11MB3301.namprd11.prod.outlook.com ([fe80::f43b:a137:dab8:8b0b]) by BYAPR11MB3301.namprd11.prod.outlook.com ([fe80::f43b:a137:dab8:8b0b%6]) with mapi id 15.20.3348.019; Sun, 6 Sep 2020 22:01:47 +0000 From: "Ananyev, Konstantin" To: "Power, Ciara" , "dev@dpdk.org" CC: "Power, Ciara" , Ray Kinsella , Neil Horman Thread-Topic: [dpdk-dev] [PATCH v2 01/17] eal: add max SIMD bitwidth Thread-Index: AQHWfI2UlRqIMlHc70y2g8LJBTFbdalcNOuQ Date: Sun, 6 Sep 2020 22:01:47 +0000 Message-ID: References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> <20200827161304.32300-2-ciara.power@intel.com> In-Reply-To: <20200827161304.32300-2-ciara.power@intel.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; 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DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata: EgVna7ofClQCo4dDJ0IsABQmCsahPq7xDOSDh1U/pnBJDD/TWeT1JruIgCSESw7OGgnAfl/zeFE3glQzKsO3ezwW50jueb+v2cHnok3ISe6yHsBgbVJ8twye4Qh09p0Qd4oB/B8TwBWGtQJdI8AXKr2wCqBDIfc4KX3YIAqc+RTQM2dLVDsWFHOrTeiqDQGQbnUI80EMO1GanTWq9YCixrGZwrcQFLbAFeIqXDWaMRPvbmAf7znzqkjh7EPGG1ujcTCSfEN1qjERylbTqsm5K8DZheRFN2f30bu71RMXSuKNvjpOEwP2Ylf201Vam5kK/6rCvTC9wh/vmaNZKg21IF83ya/Tlfps0yuh1xCvtOkrWVQDqbJ5QM086K7UXEc4jPeaeG3e8i23qmdAwYb6hjwUY46ba0E9d0okNb1LSMErUpc44EgyF91lnz7ebVUe6JsVcB9elRQNGn+JIIiEx5Yxm2iPZhZhzjBhvkFMjzVyW/Ja6xxNNIxN9m+rGejuczHjx0Ms9vt6SB4V/F9Vo32uZRWqKclAEyPWpKzd/ijGud7t7ULZhK7gdghkJHPx1LA20W1PxDJsh1Zd0g+3PAuWX9Y4pFaApGofhBtyvtrU67C3FTFBzEXqLxpi0gR2la+yIIwLO/j8K2cvIAH5eQ== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB3301.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d3ca69fa-e9a6-4230-e796-08d852b07366 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Sep 2020 22:01:47.5488 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /pWszfBK4YRcaW2HN8BzREk66dpVQGeDqLDFIwG3HsN4ptx9p7yGz5oVzUZ+aRiGn0ygDE5TSR1kKxiGJt4t5hgRIPJAXJ2gIibQnDHSc/o= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB2903 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v2 01/17] eal: add max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > This patch adds a max SIMD bitwidth EAL configuration. The API allows > for an app to set this value. It can also be set using EAL argument > --force-max-simd-bitwidth, which will lock the value and override any > modifications made by the app. >=20 > Signed-off-by: Ciara Power >=20 > --- > v2: Added to Doxygen comment for API. > --- > lib/librte_eal/common/eal_common_options.c | 60 ++++++++++++++++++++++ > lib/librte_eal/common/eal_internal_cfg.h | 8 +++ > lib/librte_eal/common/eal_options.h | 2 + > lib/librte_eal/include/rte_eal.h | 32 ++++++++++++ > lib/librte_eal/rte_eal_version.map | 4 ++ > 5 files changed, 106 insertions(+) >=20 > diff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/= common/eal_common_options.c > index a5426e1234..90f4e8f5c3 100644 > --- a/lib/librte_eal/common/eal_common_options.c > +++ b/lib/librte_eal/common/eal_common_options.c > @@ -102,6 +102,7 @@ eal_long_options[] =3D { > {OPT_MATCH_ALLOCATIONS, 0, NULL, OPT_MATCH_ALLOCATIONS_NUM}, > {OPT_TELEMETRY, 0, NULL, OPT_TELEMETRY_NUM }, > {OPT_NO_TELEMETRY, 0, NULL, OPT_NO_TELEMETRY_NUM }, > + {OPT_FORCE_MAX_SIMD_BITWIDTH, 1, NULL, OPT_FORCE_MAX_SIMD_BITWIDTH_NUM}= , > {0, 0, NULL, 0 } > }; >=20 > @@ -1309,6 +1310,32 @@ eal_parse_iova_mode(const char *name) > return 0; > } >=20 > +static int > +eal_parse_simd_bitwidth(const char *arg, bool locked) > +{ > + char *end; > + uint16_t bitwidth; > + int ret; > + struct internal_config *internal_conf =3D > + eal_get_internal_configuration(); > + > + if (arg =3D=3D NULL || arg[0] =3D=3D '\0') > + return -1; > + > + errno =3D 0; > + bitwidth =3D strtoul(arg, &end, 0); As I can see with that assignment you'll loose high bits set (if any). So, --force-max-simd-bitwidth=3D0xf0080 wouldn't report any error, while it probably should. Probably something like that, as abetter way: unsigned long t; ... t =3D strtoul(arg, &end, 0); if (t > UINT16_MAX || errno !=3D 0 || end =3D=3D NULL || *end !=3D '\0') return -1; ret =3D rte_set_max_simd_bitwidth(t); > + > + /* check for errors */ > + if ((errno !=3D 0) || end =3D=3D NULL || (*end !=3D '\0')) > + return -1; > + > + ret =3D rte_set_max_simd_bitwidth(bitwidth); > + if (ret < 0) > + return -1; > + internal_conf->max_simd_bitwidth.locked =3D locked; > + return 0; > +} > +