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DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata: S+IOE8C6qoKt5rkiOkapavhmNIN/Ws4zAwVpMGIENSJviXRL07apGoDD9ZS0jp/OAYfqCu7b75G8MpD7rK00RbuHNHadpvJ0hiRDPVctR70T5yJfeQA5SeuyB76rOaTCpUa/4WyX8bEF3kGNSxmBQHAqbRkabfk65UFgsO02j9loUH7/3uPbEEhc7CP/WGyc81k68hg6Noq06UY3ZqCGKolJP2E/DLZLoMQnyNn8o0hxaxHF66KbEZR2BqQvoL8nzWCua1k68pOjYZJiXL+FQCeQrdNs48TZ62UX9An2PbXtICKqO012WCN8Nq//aQiCZY1sea14Tx/O7s0YJde1legYujKM8PfArn4k7b+iIUkjBkBFWY9hZZhGMTLmpUuFWvfP9JI5bgX8nEOKked2itdpHUh4gIlnIPM9BimdgAt2PLqoCNFZtObxItY1j8dvRCGqQtNcut2Wu0q/uaVkpp95pNX503PrjPJng9Xs4xyujmL4HxayeseUl5ooxm6Imb4MaSc9xR0dkNL1X2pERBckQVnt8CADB5j0JwnD0cOvLhlFkdebu9rpc58lMAeNULB1CUVQxzwdNutB9/RgVW0o/HEO2z8iSrE6jVmSplsEWIGLdqlq5defyy5wP31VohfLmMn1Y5UF1RQdU9whng== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB3494.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1ee0624d-c61c-4d4a-e84f-08d86a5b1c48 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Oct 2020 00:51:21.9874 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 56UsUabXG2SlMr2AZ3eCbog69P6O+YcraEqtA7t7qndXlFAY4ZwCCtE1YY9tdf1x9I9RBrk+GUc+8S6MPY8yFg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB2984 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v3 16/18] efd: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Power, Ciara > Sent: Wednesday, September 30, 2020 6:04 AM > To: dev@dpdk.org > Cc: Power, Ciara ; Marohn, Byron > ; Wang, Yipeng1 > Subject: [PATCH v3 16/18] efd: add checks for max SIMD bitwidth >=20 > When choosing a vector path to take, an extra condition must be satisfied= to > ensure the max SIMD bitwidth allows for the CPU enabled path. >=20 > Cc: Byron Marohn > Cc: Yipeng Wang >=20 > Signed-off-by: Ciara Power > --- > lib/librte_efd/rte_efd.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) >=20 > diff --git a/lib/librte_efd/rte_efd.c b/lib/librte_efd/rte_efd.c index > 6a799556d4..509ecc8256 100644 > --- a/lib/librte_efd/rte_efd.c > +++ b/lib/librte_efd/rte_efd.c > @@ -645,7 +645,9 @@ rte_efd_create(const char *name, uint32_t > max_num_rules, uint32_t key_len, > * For less than 4 bits, scalar function performs better > * than vectorised version > */ > - if (RTE_EFD_VALUE_NUM_BITS > 3 && > rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) > + if (RTE_EFD_VALUE_NUM_BITS > 3 > + && rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) > + && rte_get_max_simd_bitwidth() >=3D > RTE_MAX_256_SIMD) > table->lookup_fn =3D EFD_LOOKUP_AVX2; > else > #endif > @@ -655,7 +657,8 @@ rte_efd_create(const char *name, uint32_t > max_num_rules, uint32_t key_len, > * than vectorised version > */ > if (RTE_EFD_VALUE_NUM_BITS > 16 && > - rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON)) > + rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON) && > + rte_get_max_simd_bitwidth() >=3D > RTE_MAX_128_SIMD) > table->lookup_fn =3D EFD_LOOKUP_NEON; > else > #endif > -- > 2.17.1 [Wang, Yipeng]=20 Acked-by: Yipeng Wang