From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3AF71A057B; Thu, 2 Apr 2020 10:26:20 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 88FCE1BE96; Thu, 2 Apr 2020 10:26:19 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id D3D612B8B for ; Thu, 2 Apr 2020 10:26:16 +0200 (CEST) IronPort-SDR: XkzN4l8Z8mixYvKQs9TdJr1JJ4fxWlx0MhC0UQGc7NuxJkqoLONRppyzfQ7XyMeCDNEmrjPIxe d4L/hzaH48Fg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2020 01:26:15 -0700 IronPort-SDR: 2bptsOKGZWfko5kbaud7ylgOMKWrnfHqctwWS8NluSq3f6Nl6FLuohg7XVb2ER9k2Rc5/x6VOv XIchH0FOi8jg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,335,1580803200"; d="scan'208";a="360124004" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga001.fm.intel.com with ESMTP; 02 Apr 2020 01:26:15 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 2 Apr 2020 01:26:11 -0700 Received: from FMSEDG001.ED.cps.intel.com (10.1.192.133) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 2 Apr 2020 01:26:10 -0700 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (104.47.55.170) by edgegateway.intel.com (192.55.55.68) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 2 Apr 2020 01:25:46 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=VE6Mp0fQ+kW2Zq8DPY3Ie9hXDmyy8cqAyJhEv1A4Lkr4fw+GW9oX3mPShXMdU+Q+t9BfoZDiGz17bA7soHoEKeLEpan+XMj8F0jRyFcDfB1s0XTtO+7FbZmTVc4JpkyUNzEACh5KhCg/bsw32JPWY/cag4pZhE5B+uS7neaP5RcdWh6Mk43fyYH2JcJBt/S7hC4kFLGghp90/BdlKb9VmjJ7grkAop+VpfS8C9upHFKMooeiIej/n77inaV2epWIX7oLEo4nXy9gZfLxpvaA/ceuvknnbuTOMAFF4RGZsZi88cMg6Mb/yqKWtdbeI+umXY3rytJjeOy9oXeOIj+Rzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SCIQVoVtG81jpSD0PezYPLDMRcFg5uGz22wuVYxIAX4=; b=BViHyaDxp38kWnEbgrjj317+5FocPIN5zAnaBwHjbcCyzEnjCvXE7XDjcni4DFBL84uJuNTsb9cLSvse75vDD+a+ltm1dC4t3qN1YS68XZXoxUD3Ay+gKmWXJu/qGzBdq4aBM+Nd2VmUN7+AT6L8hd7WjkOjr9p4BNFoNdRW3wqPcdTpZdlXTdiDsz4bxkkhZMy6/WsgPHchh8p/zbKwyeSpidbPuDM4I0/AVHzNZQyD7jDczj+H5Rcos6so7SqakuuC58fOc0M5lwpUWRDtSC0rg3bSNyWWlZrQJGvd5eVNL+ra0UHgOky/HXpUX8sRUf15+34NEYX0bf059eAr7w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SCIQVoVtG81jpSD0PezYPLDMRcFg5uGz22wuVYxIAX4=; b=nK7pcncl18Nchy0EABSOnL9BxtQql+zxlf79+DD87syxUxoQIQp5Ok5YroOSYkALmod03rSusGXFIUNmNVsPW02zWPOawxiWeutlSH9pv9E9pMFPdZGaYJ3NGcUfjRkG8CeevVcGeRUhDP2AJeYt+0XR0/LjwQIWcvn+p5vo6Gc= Received: from BYAPR11MB3541.namprd11.prod.outlook.com (2603:10b6:a03:f5::16) by BYAPR11MB3063.namprd11.prod.outlook.com (2603:10b6:a03:89::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2856.20; Thu, 2 Apr 2020 08:25:16 +0000 Received: from BYAPR11MB3541.namprd11.prod.outlook.com ([fe80::e8ad:5730:3ad0:87c6]) by BYAPR11MB3541.namprd11.prod.outlook.com ([fe80::e8ad:5730:3ad0:87c6%7]) with mapi id 15.20.2878.014; Thu, 2 Apr 2020 08:25:16 +0000 From: "Xing, Beilei" To: "Cui, LunyuanX" , "dev@dpdk.org" CC: "Yang, Qiming" , "Wu, Jingjing" Thread-Topic: [PATCH v7] net/i40e: enable MAC address as FDIR input set Thread-Index: AQHWCMaMCFeo5sAyEECDPWa0jJ1l3qhlftAw Date: Thu, 2 Apr 2020 08:25:16 +0000 Message-ID: References: <20200316004722.5323-1-lunyuanx.cui@intel.com> <20200402075847.10701-1-lunyuanx.cui@intel.com> In-Reply-To: <20200402075847.10701-1-lunyuanx.cui@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=beilei.xing@intel.com; x-originating-ip: [192.102.204.38] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 25ed0317-29a8-4a69-8f2a-08d7d6df5f67 x-ms-traffictypediagnostic: BYAPR11MB3063: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:1468; x-forefront-prvs: 0361212EA8 x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:BYAPR11MB3541.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(10019020)(39860400002)(396003)(346002)(376002)(136003)(366004)(55016002)(33656002)(26005)(66946007)(64756008)(66476007)(71200400001)(66556008)(66446008)(76116006)(5660300002)(107886003)(478600001)(186003)(54906003)(316002)(53546011)(2906002)(9686003)(4326008)(86362001)(7696005)(6506007)(52536014)(30864003)(81156014)(81166006)(110136005)(8936002)(8676002); DIR:OUT; SFP:1102; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: X0JzqYDY9Q+wKEuuqdV6h36P/I/2eyX8xK9+p3BozLAHVLLBvFUCgVHoAw3D2ZZKgsKJ/o/6aTBSEhXs5R7lb75DHKscgRNG0EStEs0aoZjpJef0FlhqCwe+PzWvtyHe4wV5dRPmWqdmO6zOkAp870RcU44EvtscKP6SBTuEvYLt6WXQ5xmIcS/PCsNXEaT0UfZD3pzhI/ieH2qiKn6U0c7ciFQyRVxCTy6e7z+CJMuAMiwTbC48y4fg0TKgrzQ30JyjDbb1FuBojk0CUdifotW+QzMq8q1y3YNar/ND71XkxpJ4I6Cxa3W9SczfK44f/ssBTG9+ujBSKchoeygtzVjNnse1ZQw6qMdYyZj2L4mxxDiaXsdbDj31YZFsKe+wp8DxqORSRPJnEdPDY/6qESLONNn/p26W3CSEdO/QWiImMI5VKeOpQ4rG5hUKuciZ x-ms-exchange-antispam-messagedata: +c7GDq6BnI0GiB/S1tGLF70wHjJEPQxjg0LV68D4KtxY9QiVcfL4jCA9XSDKiXSujBN9/PxE/JdFfy9/dABXm1Ug2gE11iB6TjAOdjcNErI7CbdmQs6r5GA1sPqzjHfXwNrZMglEY6TvT0Zo/1z2Ag== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 25ed0317-29a8-4a69-8f2a-08d7d6df5f67 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Apr 2020 08:25:16.1358 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: qzy10gjYfGyeUUTJhwL3X4pmWjNv20+XhhlLZmYQZQJU4tGBNIm+vWF+Lr6wUoRnlIgIFTyeZms3FEHFccNeBQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3063 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v7] net/i40e: enable MAC address as FDIR input set X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Cui, LunyuanX > Sent: Thursday, April 2, 2020 3:59 PM > To: dev@dpdk.org > Cc: Xing, Beilei ; Yang, Qiming > ; Wu, Jingjing ; Cui, > LunyuanX > Subject: [PATCH v7] net/i40e: enable MAC address as FDIR input set >=20 > Enable source MAC address and destination MAC address as FDIR's input set > for ipv4-other, ipv4-udp and ipv4-tcp. When OVS-DPDK is working as a pure > L2 switch, enable MAC address as FDIR input set with Mark+RSS action woul= d > help the performance speed up. And FVL FDIR supports to change input set > with MAC address. >=20 > Signed-off-by: Lunyuan Cui >=20 > --- > v7: > - Change commit message and error info > v6: > - Change commit message > v5: > - Change error info > v4: > - Enable MAC address as FDIR's input set for ipv4-udp and ipv4-tcp > v3: > - Enable MAC address as FDIR's input set > v2: > - Enable src MAC address as FDIR's input set > --- > doc/guides/rel_notes/release_20_05.rst | 6 ++ > drivers/net/i40e/i40e_ethdev.c | 3 + > drivers/net/i40e/i40e_ethdev.h | 9 +- > drivers/net/i40e/i40e_fdir.c | 6 ++ > drivers/net/i40e/i40e_flow.c | 131 +++++++++++++++++-------- > 5 files changed, 114 insertions(+), 41 deletions(-) >=20 > diff --git a/doc/guides/rel_notes/release_20_05.rst > b/doc/guides/rel_notes/release_20_05.rst > index 000bbf501..65f76f001 100644 > --- a/doc/guides/rel_notes/release_20_05.rst > +++ b/doc/guides/rel_notes/release_20_05.rst > @@ -62,6 +62,12 @@ New Features >=20 > * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit. >=20 > +* **Updated Intel i40e driver.** > + > + Updated i40e PMD with new features and improvements, including: > + > + * Enable MAC address as FDIR input set for ipv4-other, ipv4-udp and ip= v4- > tcp. > + >=20 > Removed Items > ------------- > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 9539b0470..530908b0e 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -9342,6 +9342,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype > pctype, > I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_PROTO | > I40E_INSET_IPV4_TTL, > [I40E_FILTER_PCTYPE_NONF_IPV4_UDP] =3D > + I40E_INSET_DMAC | I40E_INSET_SMAC | > I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER | > I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST | > I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL | @@ -9357,6 > +9358,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype, > I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL | > I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, > [I40E_FILTER_PCTYPE_NONF_IPV4_TCP] =3D > + I40E_INSET_DMAC | I40E_INSET_SMAC | > I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER | > I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST | > I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_TTL | @@ -9373,6 > +9375,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype, > I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT | > I40E_INSET_SCTP_VT, > [I40E_FILTER_PCTYPE_NONF_IPV4_OTHER] =3D > + I40E_INSET_DMAC | I40E_INSET_SMAC | > I40E_INSET_VLAN_OUTER | I40E_INSET_VLAN_INNER | > I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST | > I40E_INSET_IPV4_TOS | I40E_INSET_IPV4_PROTO | diff --git > a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index > aac89de91..dbb5d594a 100644 > --- a/drivers/net/i40e/i40e_ethdev.h > +++ b/drivers/net/i40e/i40e_ethdev.h > @@ -544,12 +544,19 @@ struct i40e_ipv6_l2tpv3oip_flow { > uint32_t session_id; /* Session ID in big endian. */ }; >=20 > +/* A structure used to define the input for l2 dst type flow */ struct > +i40e_l2_flow { > + struct rte_ether_addr dst; > + struct rte_ether_addr src; > + uint16_t ether_type; /**< Ether type in big endian */ > +}; > + > /* > * A union contains the inputs for all types of flow > * items in flows need to be in big endian > */ > union i40e_fdir_flow { > - struct rte_eth_l2_flow l2_flow; > + struct i40e_l2_flow l2_flow; > struct rte_eth_udpv4_flow udp4_flow; > struct rte_eth_tcpv4_flow tcp4_flow; > struct rte_eth_sctpv4_flow sctp4_flow; > diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c = index > 931f25976..2f24615b6 100644 > --- a/drivers/net/i40e/i40e_fdir.c > +++ b/drivers/net/i40e/i40e_fdir.c > @@ -1062,7 +1062,13 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf > *pf, > [I40E_FILTER_PCTYPE_NONF_IPV6_OTHER] =3D IPPROTO_NONE, > }; >=20 > + rte_memcpy(raw_pkt, &fdir_input->flow.l2_flow.dst, > + sizeof(struct rte_ether_addr)); > + rte_memcpy(raw_pkt + sizeof(struct rte_ether_addr), > + &fdir_input->flow.l2_flow.src, > + sizeof(struct rte_ether_addr)); > raw_pkt +=3D 2 * sizeof(struct rte_ether_addr); > + > if (vlan && fdir_input->flow_ext.vlan_tci) { > rte_memcpy(raw_pkt, vlan_frame, sizeof(vlan_frame)); > rte_memcpy(raw_pkt + sizeof(uint16_t), diff --git > a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index > d877ac250..b1861a7db 100644 > --- a/drivers/net/i40e/i40e_flow.c > +++ b/drivers/net/i40e/i40e_flow.c > @@ -2626,8 +2626,24 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev > *dev, > } >=20 > if (eth_spec && eth_mask) { > - if (!rte_is_zero_ether_addr(ð_mask->src) > || > - !rte_is_zero_ether_addr(ð_mask->dst)) > { > + if (rte_is_broadcast_ether_addr(ð_mask- > >dst) && > + rte_is_zero_ether_addr(ð_mask- > >src)) { > + filter->input.flow.l2_flow.dst =3D > + eth_spec->dst; > + input_set |=3D I40E_INSET_DMAC; > + } else if (rte_is_zero_ether_addr(ð_mask- > >dst) && > + > rte_is_broadcast_ether_addr(ð_mask->src)) { > + filter->input.flow.l2_flow.src =3D > + eth_spec->src; > + input_set |=3D I40E_INSET_SMAC; > + } else if > (rte_is_broadcast_ether_addr(ð_mask->dst) && > + > rte_is_broadcast_ether_addr(ð_mask->src)) { > + filter->input.flow.l2_flow.dst =3D > + eth_spec->dst; > + filter->input.flow.l2_flow.src =3D > + eth_spec->src; > + input_set |=3D (I40E_INSET_DMAC | > I40E_INSET_SMAC); > + } else { > rte_flow_error_set(error, EINVAL, >=20 > RTE_FLOW_ERROR_TYPE_ITEM, > item, > @@ -2635,7 +2651,8 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev > *dev, > return -rte_errno; > } > } > - if (eth_spec && eth_mask && eth_mask->type) { > + if (eth_spec && eth_mask && > + next_type =3D=3D RTE_FLOW_ITEM_TYPE_END) { > if (eth_mask->type !=3D RTE_BE16(0xffff)) { > rte_flow_error_set(error, EINVAL, >=20 > RTE_FLOW_ERROR_TYPE_ITEM, > @@ -2750,21 +2767,33 @@ i40e_flow_parse_fdir_pattern(struct > rte_eth_dev *dev, > frag_off & RTE_IPV4_HDR_MF_FLAG) > pctype =3D > I40E_FILTER_PCTYPE_FRAG_IPV4; >=20 > - /* Get the filter info */ > - filter->input.flow.ip4_flow.proto =3D > - ipv4_spec->hdr.next_proto_id; > - filter->input.flow.ip4_flow.tos =3D > - ipv4_spec->hdr.type_of_service; > - filter->input.flow.ip4_flow.ttl =3D > - ipv4_spec->hdr.time_to_live; > - filter->input.flow.ip4_flow.src_ip =3D > - ipv4_spec->hdr.src_addr; > - filter->input.flow.ip4_flow.dst_ip =3D > - ipv4_spec->hdr.dst_addr; > - > - filter->input.flow_ext.inner_ip =3D false; > - filter->input.flow_ext.oip_type =3D > - I40E_FDIR_IPTYPE_IPV4; > + if (input_set & (I40E_INSET_DMAC | > I40E_INSET_SMAC)) { > + if (input_set & (I40E_INSET_IPV4_SRC > | > + I40E_INSET_IPV4_DST | > I40E_INSET_IPV4_TOS | > + I40E_INSET_IPV4_TTL | > I40E_INSET_IPV4_PROTO)) { > + rte_flow_error_set(error, > EINVAL, > + > RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "L2 and L3 input set > are exclusive."); > + return -rte_errno; > + } > + } else { > + /* Get the filter info */ > + filter->input.flow.ip4_flow.proto =3D > + ipv4_spec- > >hdr.next_proto_id; > + filter->input.flow.ip4_flow.tos =3D > + ipv4_spec- > >hdr.type_of_service; > + filter->input.flow.ip4_flow.ttl =3D > + ipv4_spec->hdr.time_to_live; > + filter->input.flow.ip4_flow.src_ip =3D > + ipv4_spec->hdr.src_addr; > + filter->input.flow.ip4_flow.dst_ip =3D > + ipv4_spec->hdr.dst_addr; > + > + filter->input.flow_ext.inner_ip =3D false; > + filter->input.flow_ext.oip_type =3D > + I40E_FDIR_IPTYPE_IPV4; > + } > } else if (!ipv4_spec && !ipv4_mask && !outer_ip) { > filter->input.flow_ext.inner_ip =3D true; > filter->input.flow_ext.iip_type =3D > @@ -2894,17 +2923,28 @@ i40e_flow_parse_fdir_pattern(struct > rte_eth_dev *dev, > if (tcp_mask->hdr.dst_port =3D=3D UINT16_MAX) > input_set |=3D I40E_INSET_DST_PORT; >=20 > - /* Get filter info */ > - if (l3 =3D=3D RTE_FLOW_ITEM_TYPE_IPV4) { > - filter->input.flow.tcp4_flow.src_port > =3D > - tcp_spec->hdr.src_port; > - filter->input.flow.tcp4_flow.dst_port > =3D > - tcp_spec->hdr.dst_port; > - } else if (l3 =3D=3D RTE_FLOW_ITEM_TYPE_IPV6) { > - filter->input.flow.tcp6_flow.src_port > =3D > - tcp_spec->hdr.src_port; > - filter->input.flow.tcp6_flow.dst_port > =3D > - tcp_spec->hdr.dst_port; > + if (input_set & (I40E_INSET_DMAC | > I40E_INSET_SMAC)) { > + if (input_set & > + (I40E_INSET_SRC_PORT | > I40E_INSET_DST_PORT)) { > + rte_flow_error_set(error, > EINVAL, > + > RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "L2 and L4 input set > are exclusive."); > + return -rte_errno; > + } > + } else { > + /* Get filter info */ > + if (l3 =3D=3D RTE_FLOW_ITEM_TYPE_IPV4) > { > + filter- > >input.flow.tcp4_flow.src_port =3D > + tcp_spec- > >hdr.src_port; > + filter- > >input.flow.tcp4_flow.dst_port =3D > + tcp_spec- > >hdr.dst_port; > + } else if (l3 =3D=3D > RTE_FLOW_ITEM_TYPE_IPV6) { > + filter- > >input.flow.tcp6_flow.src_port =3D > + tcp_spec- > >hdr.src_port; > + filter- > >input.flow.tcp6_flow.dst_port =3D > + tcp_spec- > >hdr.dst_port; > + } > } > } >=20 > @@ -2938,17 +2978,28 @@ i40e_flow_parse_fdir_pattern(struct > rte_eth_dev *dev, > if (udp_mask->hdr.dst_port =3D=3D UINT16_MAX) > input_set |=3D I40E_INSET_DST_PORT; >=20 > - /* Get filter info */ > - if (l3 =3D=3D RTE_FLOW_ITEM_TYPE_IPV4) { > - filter->input.flow.udp4_flow.src_port > =3D > - udp_spec->hdr.src_port; > - filter->input.flow.udp4_flow.dst_port > =3D > - udp_spec->hdr.dst_port; > - } else if (l3 =3D=3D RTE_FLOW_ITEM_TYPE_IPV6) { > - filter->input.flow.udp6_flow.src_port > =3D > - udp_spec->hdr.src_port; > - filter->input.flow.udp6_flow.dst_port > =3D > - udp_spec->hdr.dst_port; > + if (input_set & (I40E_INSET_DMAC | > I40E_INSET_SMAC)) { > + if (input_set & > + (I40E_INSET_SRC_PORT | > I40E_INSET_DST_PORT)) { > + rte_flow_error_set(error, > EINVAL, > + > RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "L2 and L4 input set > are exclusive."); > + return -rte_errno; > + } > + } else { > + /* Get filter info */ > + if (l3 =3D=3D RTE_FLOW_ITEM_TYPE_IPV4) > { > + filter- > >input.flow.udp4_flow.src_port =3D > + udp_spec- > >hdr.src_port; > + filter- > >input.flow.udp4_flow.dst_port =3D > + udp_spec- > >hdr.dst_port; > + } else if (l3 =3D=3D > RTE_FLOW_ITEM_TYPE_IPV6) { > + filter- > >input.flow.udp6_flow.src_port =3D > + udp_spec- > >hdr.src_port; > + filter- > >input.flow.udp6_flow.dst_port =3D > + udp_spec- > >hdr.dst_port; > + } > } > } > filter->input.flow_ext.is_udp =3D true; > -- > 2.17.1 Acked-by: Beilei Xing