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From: Odi Assli <odia@nvidia.com>
To: Tal Shnaiderman <talshn@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>,
	Matan Azrad <matan@nvidia.com>,
	Raslan Darawsheh <rasland@nvidia.com>,
	Asaf Penso <asafp@nvidia.com>
Subject: Re: [dpdk-dev] [PATCH 2/3] common/mlx5: read checksum capability from DevX
Date: Thu, 22 Apr 2021 10:17:35 +0000	[thread overview]
Message-ID: <BYAPR12MB2824104FF002C37C77622F4CAB469@BYAPR12MB2824.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20210421163441.17240-3-talshn@nvidia.com>

> Subject: [PATCH 2/3] common/mlx5: read checksum capability from DevX
> 
> mlx5 in Windows needs the hca capability csum_cap to query the NIC for
> checksum offloading support
> 
> Added the capability as part of the capabilities queried by the PMD using
> DevX.
> 
> Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
> ---
>  drivers/common/mlx5/mlx5_devx_cmds.c | 2 ++
> drivers/common/mlx5/mlx5_devx_cmds.h | 1 +
>  2 files changed, 3 insertions(+)
> 
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
> b/drivers/common/mlx5/mlx5_devx_cmds.c
> index 268bcd0d99..d2e4ab33a2 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.c
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.c
> @@ -837,6 +837,8 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
>  	hcattr = MLX5_ADDR_OF(query_hca_cap_out, out, capability);
>  	attr->wqe_vlan_insert =
> MLX5_GET(per_protocol_networking_offload_caps,
>  					 hcattr, wqe_vlan_insert);
> +	attr->csum_cap =
> MLX5_GET(per_protocol_networking_offload_caps,
> +					 hcattr, csum_cap);
>  	attr->lro_cap = MLX5_GET(per_protocol_networking_offload_caps,
> hcattr,
>  				 lro_cap);
>  	attr->tunnel_lro_gre =
> MLX5_GET(per_protocol_networking_offload_caps,
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h
> b/drivers/common/mlx5/mlx5_devx_cmds.h
> index 67b5f771c6..1fb9130e51 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.h
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.h
> @@ -92,6 +92,7 @@ struct mlx5_hca_attr {
>  	uint32_t eth_net_offloads:1;
>  	uint32_t eth_virt:1;
>  	uint32_t wqe_vlan_insert:1;
> +	uint32_t csum_cap:1;
>  	uint32_t wqe_inline_mode:2;
>  	uint32_t vport_inline_mode:3;
>  	uint32_t tunnel_stateless_geneve_rx:1;
> --
> 2.16.1.windows.4

Tested-by: Odi Assli <odia@nvidia.com>

  reply	other threads:[~2021-04-22 10:17 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-21 16:34 [dpdk-dev] [PATCH 0/3] mlx5 - support checksum offloads on Windows Tal Shnaiderman
2021-04-21 16:34 ` [dpdk-dev] [PATCH 1/3] net/mlx5: fix unsupported offloads disablement Tal Shnaiderman
2021-04-22 10:17   ` Odi Assli
2021-04-21 16:34 ` [dpdk-dev] [PATCH 2/3] common/mlx5: read checksum capability from DevX Tal Shnaiderman
2021-04-22 10:17   ` Odi Assli [this message]
2021-04-21 16:34 ` [dpdk-dev] [PATCH 3/3] net/mlx5: support checksum offload on Windows Tal Shnaiderman
2021-04-22 10:17   ` Odi Assli
2021-04-28 12:06 ` [dpdk-dev] [PATCH 0/3] mlx5 - support checksum offloads " Raslan Darawsheh

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