* [v1] net/mlx5: support represented port item @ 2022-04-02 6:40 Sean Zhang 2022-06-06 7:21 ` Slava Ovsiienko ` (2 more replies) 0 siblings, 3 replies; 9+ messages in thread From: Sean Zhang @ 2022-04-02 6:40 UTC (permalink / raw) To: Matan Azrad, Viacheslav Ovsiienko; +Cc: dev Add support for represented_port item in pattern. And if the spec and mask both are NULL, translate function will not add source vport to matcher. For example, testpmd starts with PF, VF-rep0 and VF-rep1, below command will redirect packets from VF0 and VF1 to wire: testpmd> flow create 0 ingress transfer group 0 pattern eth / represented_port / end actions represented_port ethdev_id is 0 / end Signed-off-by: Sean Zhang <xiazhang@nvidia.com> --- drivers/net/mlx5/mlx5_flow.h | 4 + drivers/net/mlx5/mlx5_flow_dv.c | 160 +++++++++++++++++++++++++++++++- 2 files changed, 163 insertions(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index f56115dd11..0740b01de5 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -186,6 +186,10 @@ enum mlx5_feature_name { #define MLX5_FLOW_ITEM_INNER_FLEX (UINT64_C(1) << 38) #define MLX5_FLOW_ITEM_FLEX_TUNNEL (UINT64_C(1) << 39) +/* Port Representor/Represented Port item */ +#define MLX5_FLOW_ITEM_PORT_REPRESENTOR (UINT64_C(1) << 40) +#define MLX5_FLOW_ITEM_REPRESENTED_PORT (UINT64_C(1) << 41) + /* Outer Masks. */ #define MLX5_FLOW_LAYER_OUTER_L3 \ (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 1e9bd63635..f20a64e8e4 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -2209,6 +2209,80 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev, return 0; } +/** + * Validate represented port item. + * + * @param[in] dev + * Pointer to the rte_eth_dev structure. + * @param[in] item + * Item specification. + * @param[in] attr + * Attributes of flow that includes this item. + * @param[in] item_flags + * Bit-fields that holds the items detected until now. + * @param[out] error + * Pointer to error structure. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +static int +flow_dv_validate_item_represented_port(struct rte_eth_dev *dev, + const struct rte_flow_item *item, + const struct rte_flow_attr *attr, + uint64_t item_flags, + struct rte_flow_error *error) +{ + const struct rte_flow_item_ethdev *spec = item->spec; + const struct rte_flow_item_ethdev *mask = item->mask; + const struct rte_flow_item_ethdev switch_mask = { + .port_id = UINT16_MAX, + }; + struct mlx5_priv *esw_priv; + struct mlx5_priv *dev_priv; + int ret; + + if (!attr->transfer) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, NULL, + "match on port id is valid only when transfer flag is enabled"); + if (item_flags & MLX5_FLOW_ITEM_REPRESENTED_PORT) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ITEM, item, + "multiple source ports are not supported"); + if (!mask) + mask = &switch_mask; + if (mask->port_id != UINT16_MAX) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, + "no support for partial mask on \"id\" field"); + ret = mlx5_flow_item_acceptable + (item, (const uint8_t *)mask, + (const uint8_t *)&rte_flow_item_ethdev_mask, + sizeof(struct rte_flow_item_ethdev), + MLX5_ITEM_RANGE_NOT_ACCEPTED, error); + if (ret) + return ret; + if (!spec || spec->port_id == UINT16_MAX) + return 0; + esw_priv = mlx5_port_to_eswitch_info(spec->port_id, false); + if (!esw_priv) + return rte_flow_error_set(error, rte_errno, + RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec, + "failed to obtain E-Switch info for port"); + dev_priv = mlx5_dev_to_eswitch_info(dev); + if (!dev_priv) + return rte_flow_error_set(error, rte_errno, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "failed to obtain E-Switch info"); + if (esw_priv->domain_id != dev_priv->domain_id) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec, + "cannot match on a port from a different E-Switch"); + return 0; +} + /** * Validate VLAN item. * @@ -6963,6 +7037,13 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, last_item = MLX5_FLOW_ITEM_PORT_ID; port_id_item = items; break; + case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT: + ret = flow_dv_validate_item_represented_port + (dev, items, attr, item_flags, error); + if (ret < 0) + return ret; + last_item = MLX5_FLOW_ITEM_REPRESENTED_PORT; + break; case RTE_FLOW_ITEM_TYPE_ETH: ret = mlx5_flow_validate_item_eth(items, item_flags, true, error); @@ -9918,6 +9999,77 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher, return 0; } +/** + * Translate represented port item to eswitch match on port id. + * + * @param[in] dev + * The devich to configure through. + * @param[in, out] matcher + * Flow matcher. + * @param[in, out] key + * Flow matcher value. + * @param[in] item + * Flow pattern to translate. + * @param[in] + * Flow attributes. + * + * @return + * 0 on success, a negative errno value otherwise. + */ +static int +flow_dv_translate_item_represented_port(struct rte_eth_dev *dev, void *matcher, + void *key, + const struct rte_flow_item *item, + const struct rte_flow_attr *attr) +{ + const struct rte_flow_item_ethdev *pid_m = item ? item->mask : NULL; + const struct rte_flow_item_ethdev *pid_v = item ? item->spec : NULL; + struct mlx5_priv *priv; + uint16_t mask, id; + + if (!pid_m && !pid_v) + return 0; + if (pid_v && pid_v->port_id == UINT16_MAX) { + flow_dv_translate_item_source_vport(matcher, key, + flow_dv_get_esw_manager_vport_id(dev), UINT16_MAX); + return 0; + } + mask = pid_m ? pid_m->port_id : UINT16_MAX; + id = pid_v ? pid_v->port_id : dev->data->port_id; + priv = mlx5_port_to_eswitch_info(id, item == NULL); + if (!priv) + return -rte_errno; + /* + * Translate to vport field or to metadata, depending on mode. + * Kernel can use either misc.source_port or half of C0 metadata + * register. + */ + if (priv->vport_meta_mask) { + /* + * Provide the hint for SW steering library + * to insert the flow into ingress domain and + * save the extra vport match. + */ + if (mask == UINT16_MAX && priv->vport_id == UINT16_MAX && + priv->pf_bond < 0 && attr->transfer) + flow_dv_translate_item_source_vport + (matcher, key, priv->vport_id, mask); + /* + * We should always set the vport metadata register, + * otherwise the SW steering library can drop + * the rule if wire vport metadata value is not zero, + * it depends on kernel configuration. + */ + flow_dv_translate_item_meta_vport(matcher, key, + priv->vport_meta_tag, + priv->vport_meta_mask); + } else { + flow_dv_translate_item_source_vport(matcher, key, + priv->vport_id, mask); + } + return 0; +} + /** * Add ICMP6 item to matcher and to the value. * @@ -13543,6 +13695,11 @@ flow_dv_translate(struct rte_eth_dev *dev, (dev, match_mask, match_value, items, attr); last_item = MLX5_FLOW_ITEM_PORT_ID; break; + case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT: + flow_dv_translate_item_represented_port + (dev, match_mask, match_value, items, attr); + last_item = MLX5_FLOW_ITEM_REPRESENTED_PORT; + break; case RTE_FLOW_ITEM_TYPE_ETH: flow_dv_translate_item_eth(match_mask, match_value, items, tunnel, @@ -13801,7 +13958,8 @@ flow_dv_translate(struct rte_eth_dev *dev, * In both cases the source port is set according the current port * in use. */ - if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode && + if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && + !(item_flags & MLX5_FLOW_ITEM_REPRESENTED_PORT) && priv->sh->esw_mode && !(attr->egress && !attr->transfer)) { if (flow_dv_translate_item_port_id(dev, match_mask, match_value, NULL, attr)) -- 2.21.0 ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [v1] net/mlx5: support represented port item 2022-04-02 6:40 [v1] net/mlx5: support represented port item Sean Zhang @ 2022-06-06 7:21 ` Slava Ovsiienko 2022-06-07 11:17 ` [v2] " Sean Zhang 2022-06-07 11:18 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Sean Zhang 2 siblings, 0 replies; 9+ messages in thread From: Slava Ovsiienko @ 2022-06-06 7:21 UTC (permalink / raw) To: Sean Zhang (Networking SW), Matan Azrad; +Cc: dev > -----Original Message----- > From: Sean Zhang (Networking SW) <xiazhang@nvidia.com> > Sent: Saturday, April 2, 2022 9:40 > To: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko > <viacheslavo@nvidia.com> > Cc: dev@dpdk.org > Subject: [v1] net/mlx5: support represented port item > > Add support for represented_port item in pattern. And if the spec and mask > both are NULL, translate function will not add source vport to matcher. > > For example, testpmd starts with PF, VF-rep0 and VF-rep1, below command > will redirect packets from VF0 and VF1 to wire: > testpmd> flow create 0 ingress transfer group 0 pattern eth / > represented_port / end actions represented_port ethdev_id is 0 / end > > Signed-off-by: Sean Zhang <xiazhang@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> ^ permalink raw reply [flat|nested] 9+ messages in thread
* [v2] net/mlx5: support represented port item 2022-04-02 6:40 [v1] net/mlx5: support represented port item Sean Zhang 2022-06-06 7:21 ` Slava Ovsiienko @ 2022-06-07 11:17 ` Sean Zhang 2022-06-14 7:44 ` Raslan Darawsheh 2022-06-07 11:18 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Sean Zhang 2 siblings, 1 reply; 9+ messages in thread From: Sean Zhang @ 2022-06-07 11:17 UTC (permalink / raw) To: thomas, Matan Azrad, Viacheslav Ovsiienko; +Cc: dev Add support for represented_port item in pattern. And if the spec and mask both are NULL, translate function will not add source vport to matcher. For example, testpmd starts with PF, VF-rep0 and VF-rep1, below command will redirect packets from VF0 and VF1 to wire: testpmd> flow create 0 ingress transfer group 0 pattern eth / represented_port / end actions represented_port ethdev_id is 0 / end Signed-off-by: Sean Zhang <xiazhang@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> --- v2 -- add missing doc --- doc/guides/nics/features/mlx5.ini | 1 + doc/guides/nics/mlx5.rst | 1 + doc/guides/rel_notes/release_22_07.rst | 1 + drivers/net/mlx5/mlx5_flow.h | 4 + drivers/net/mlx5/mlx5_flow_dv.c | 160 ++++++++++++++++++++++++++++++++- 5 files changed, 166 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini index 5738f35..e056516 100644 --- a/doc/guides/nics/features/mlx5.ini +++ b/doc/guides/nics/features/mlx5.ini @@ -84,6 +84,7 @@ udp = Y vlan = Y vxlan = Y vxlan_gpe = Y +represented_port = Y [rte_flow actions] age = I diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index d83c56d..1e13a93 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -93,6 +93,7 @@ Features - Connection tracking. - Sub-Function representors. - Sub-Function. +- Matching on represented port. Limitations diff --git a/doc/guides/rel_notes/release_22_07.rst b/doc/guides/rel_notes/release_22_07.rst index d46f773..28f25b1 100644 --- a/doc/guides/rel_notes/release_22_07.rst +++ b/doc/guides/rel_notes/release_22_07.rst @@ -116,6 +116,7 @@ New Features * Added support for promiscuous mode on Windows. * Added support for MTU on Windows. * Added matching and RSS on IPsec ESP. + * Added matching on represented port. * **Updated VMware vmxnet3 networking driver.** diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index eb13365..85e55eb 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -189,6 +189,10 @@ enum mlx5_feature_name { /* ESP item */ #define MLX5_FLOW_ITEM_ESP (UINT64_C(1) << 40) +/* Port Representor/Represented Port item */ +#define MLX5_FLOW_ITEM_PORT_REPRESENTOR (UINT64_C(1) << 41) +#define MLX5_FLOW_ITEM_REPRESENTED_PORT (UINT64_C(1) << 42) + /* Outer Masks. */ #define MLX5_FLOW_LAYER_OUTER_L3 \ (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index a575e31..ee0a4bd 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -2211,6 +2211,80 @@ struct field_modify_info modify_tcp[] = { } /** + * Validate represented port item. + * + * @param[in] dev + * Pointer to the rte_eth_dev structure. + * @param[in] item + * Item specification. + * @param[in] attr + * Attributes of flow that includes this item. + * @param[in] item_flags + * Bit-fields that holds the items detected until now. + * @param[out] error + * Pointer to error structure. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +static int +flow_dv_validate_item_represented_port(struct rte_eth_dev *dev, + const struct rte_flow_item *item, + const struct rte_flow_attr *attr, + uint64_t item_flags, + struct rte_flow_error *error) +{ + const struct rte_flow_item_ethdev *spec = item->spec; + const struct rte_flow_item_ethdev *mask = item->mask; + const struct rte_flow_item_ethdev switch_mask = { + .port_id = UINT16_MAX, + }; + struct mlx5_priv *esw_priv; + struct mlx5_priv *dev_priv; + int ret; + + if (!attr->transfer) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, NULL, + "match on port id is valid only when transfer flag is enabled"); + if (item_flags & MLX5_FLOW_ITEM_REPRESENTED_PORT) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ITEM, item, + "multiple source ports are not supported"); + if (!mask) + mask = &switch_mask; + if (mask->port_id != UINT16_MAX) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, + "no support for partial mask on \"id\" field"); + ret = mlx5_flow_item_acceptable + (item, (const uint8_t *)mask, + (const uint8_t *)&rte_flow_item_ethdev_mask, + sizeof(struct rte_flow_item_ethdev), + MLX5_ITEM_RANGE_NOT_ACCEPTED, error); + if (ret) + return ret; + if (!spec || spec->port_id == UINT16_MAX) + return 0; + esw_priv = mlx5_port_to_eswitch_info(spec->port_id, false); + if (!esw_priv) + return rte_flow_error_set(error, rte_errno, + RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec, + "failed to obtain E-Switch info for port"); + dev_priv = mlx5_dev_to_eswitch_info(dev); + if (!dev_priv) + return rte_flow_error_set(error, rte_errno, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "failed to obtain E-Switch info"); + if (esw_priv->domain_id != dev_priv->domain_id) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec, + "cannot match on a port from a different E-Switch"); + return 0; +} + +/** * Validate VLAN item. * * @param[in] item @@ -6972,6 +7046,13 @@ struct mlx5_list_entry * last_item = MLX5_FLOW_ITEM_PORT_ID; port_id_item = items; break; + case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT: + ret = flow_dv_validate_item_represented_port + (dev, items, attr, item_flags, error); + if (ret < 0) + return ret; + last_item = MLX5_FLOW_ITEM_REPRESENTED_PORT; + break; case RTE_FLOW_ITEM_TYPE_ETH: ret = mlx5_flow_validate_item_eth(items, item_flags, true, error); @@ -9980,6 +10061,77 @@ struct mlx5_list_entry * } /** + * Translate represented port item to eswitch match on port id. + * + * @param[in] dev + * The devich to configure through. + * @param[in, out] matcher + * Flow matcher. + * @param[in, out] key + * Flow matcher value. + * @param[in] item + * Flow pattern to translate. + * @param[in] + * Flow attributes. + * + * @return + * 0 on success, a negative errno value otherwise. + */ +static int +flow_dv_translate_item_represented_port(struct rte_eth_dev *dev, void *matcher, + void *key, + const struct rte_flow_item *item, + const struct rte_flow_attr *attr) +{ + const struct rte_flow_item_ethdev *pid_m = item ? item->mask : NULL; + const struct rte_flow_item_ethdev *pid_v = item ? item->spec : NULL; + struct mlx5_priv *priv; + uint16_t mask, id; + + if (!pid_m && !pid_v) + return 0; + if (pid_v && pid_v->port_id == UINT16_MAX) { + flow_dv_translate_item_source_vport(matcher, key, + flow_dv_get_esw_manager_vport_id(dev), UINT16_MAX); + return 0; + } + mask = pid_m ? pid_m->port_id : UINT16_MAX; + id = pid_v ? pid_v->port_id : dev->data->port_id; + priv = mlx5_port_to_eswitch_info(id, item == NULL); + if (!priv) + return -rte_errno; + /* + * Translate to vport field or to metadata, depending on mode. + * Kernel can use either misc.source_port or half of C0 metadata + * register. + */ + if (priv->vport_meta_mask) { + /* + * Provide the hint for SW steering library + * to insert the flow into ingress domain and + * save the extra vport match. + */ + if (mask == UINT16_MAX && priv->vport_id == UINT16_MAX && + priv->pf_bond < 0 && attr->transfer) + flow_dv_translate_item_source_vport + (matcher, key, priv->vport_id, mask); + /* + * We should always set the vport metadata register, + * otherwise the SW steering library can drop + * the rule if wire vport metadata value is not zero, + * it depends on kernel configuration. + */ + flow_dv_translate_item_meta_vport(matcher, key, + priv->vport_meta_tag, + priv->vport_meta_mask); + } else { + flow_dv_translate_item_source_vport(matcher, key, + priv->vport_id, mask); + } + return 0; +} + +/** * Add ICMP6 item to matcher and to the value. * * @param[in, out] matcher @@ -13615,6 +13767,11 @@ struct mlx5_list_entry * (dev, match_mask, match_value, items, attr); last_item = MLX5_FLOW_ITEM_PORT_ID; break; + case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT: + flow_dv_translate_item_represented_port + (dev, match_mask, match_value, items, attr); + last_item = MLX5_FLOW_ITEM_REPRESENTED_PORT; + break; case RTE_FLOW_ITEM_TYPE_ETH: flow_dv_translate_item_eth(match_mask, match_value, items, tunnel, @@ -13873,7 +14030,8 @@ struct mlx5_list_entry * * In both cases the source port is set according the current port * in use. */ - if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode && + if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && + !(item_flags & MLX5_FLOW_ITEM_REPRESENTED_PORT) && priv->sh->esw_mode && !(attr->egress && !attr->transfer)) { if (flow_dv_translate_item_port_id(dev, match_mask, match_value, NULL, attr)) -- 1.8.3.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [v2] net/mlx5: support represented port item 2022-06-07 11:17 ` [v2] " Sean Zhang @ 2022-06-14 7:44 ` Raslan Darawsheh 0 siblings, 0 replies; 9+ messages in thread From: Raslan Darawsheh @ 2022-06-14 7:44 UTC (permalink / raw) To: Sean Zhang (Networking SW), NBU-Contact-Thomas Monjalon (EXTERNAL), Matan Azrad, Slava Ovsiienko Cc: dev Hi, > -----Original Message----- > From: Sean Zhang <xiazhang@nvidia.com> > Sent: Tuesday, June 7, 2022 2:18 PM > To: NBU-Contact-Thomas Monjalon (EXTERNAL) <thomas@monjalon.net>; > Matan Azrad <matan@nvidia.com>; Slava Ovsiienko > <viacheslavo@nvidia.com> > Cc: dev@dpdk.org > Subject: [v2] net/mlx5: support represented port item > > Add support for represented_port item in pattern. And if the spec and mask > both are NULL, translate function will not add source vport to matcher. > > For example, testpmd starts with PF, VF-rep0 and VF-rep1, below command > will redirect packets from VF0 and VF1 to wire: > testpmd> flow create 0 ingress transfer group 0 pattern eth / > represented_port / end actions represented_port ethdev_id is 0 / end > > Signed-off-by: Sean Zhang <xiazhang@nvidia.com> > Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> > --- > v2 -- add missing doc Patch applied to next-net-mlx, Kindest regards, Raslan Darawsheh ^ permalink raw reply [flat|nested] 9+ messages in thread
* [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header 2022-04-02 6:40 [v1] net/mlx5: support represented port item Sean Zhang 2022-06-06 7:21 ` Slava Ovsiienko 2022-06-07 11:17 ` [v2] " Sean Zhang @ 2022-06-07 11:18 ` Sean Zhang 2022-06-07 11:18 ` [v2 1/3] common/mlx5: add modify ECN capability check Sean Zhang ` (3 more replies) 2 siblings, 4 replies; 9+ messages in thread From: Sean Zhang @ 2022-06-07 11:18 UTC (permalink / raw) To: thomas; +Cc: dev This patch set adds support for modifying ECN fields in IPv4/IPv6 header, and also adds support for modify_filed action in meter. --- v2 --- rebase and add missing doc --- Sean Zhang (3): common/mlx5: add modify ECN capability check net/mlx5: add support to modify ECN field net/mlx5: add modify field support in meter doc/guides/nics/mlx5.rst | 5 ++- doc/guides/rel_notes/release_22_07.rst | 1 + drivers/common/mlx5/mlx5_devx_cmds.c | 3 ++ drivers/common/mlx5/mlx5_devx_cmds.h | 1 + drivers/common/mlx5/mlx5_prm.h | 62 +++++++++++++++++++++++++++++- drivers/net/mlx5/mlx5_flow.c | 5 ++- drivers/net/mlx5/mlx5_flow.h | 2 + drivers/net/mlx5/mlx5_flow_dv.c | 69 ++++++++++++++++++++++++++++++++-- drivers/net/mlx5/mlx5_flow_meter.c | 2 +- 9 files changed, 141 insertions(+), 9 deletions(-) -- 1.8.3.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [v2 1/3] common/mlx5: add modify ECN capability check 2022-06-07 11:18 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Sean Zhang @ 2022-06-07 11:18 ` Sean Zhang 2022-06-07 11:18 ` [v2 2/3] net/mlx5: add support to modify ECN field Sean Zhang ` (2 subsequent siblings) 3 siblings, 0 replies; 9+ messages in thread From: Sean Zhang @ 2022-06-07 11:18 UTC (permalink / raw) To: thomas, Matan Azrad, Viacheslav Ovsiienko; +Cc: dev Flag outer_ip_ecn in header modify capabilities properties layout is added in order to check if the firmware supports modification of ecn field. Signed-off-by: Sean Zhang <xiazhang@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> --- drivers/common/mlx5/mlx5_devx_cmds.c | 3 ++ drivers/common/mlx5/mlx5_devx_cmds.h | 1 + drivers/common/mlx5/mlx5_prm.h | 62 +++++++++++++++++++++++++++++++++++- 3 files changed, 65 insertions(+), 1 deletion(-) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index c6bdbc1..1b85121 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -1056,6 +1056,9 @@ struct mlx5_devx_obj * attr->flow.tunnel_header_2_3 = MLX5_GET (flow_table_nic_cap, hcattr, ft_field_support_2_nic_receive.tunnel_header_2_3); + attr->modify_outer_ip_ecn = MLX5_GET + (flow_table_nic_cap, hcattr, + ft_header_modify_nic_receive.outer_ip_ecn); attr->pkt_integrity_match = mlx5_devx_query_pkt_integrity_match(hcattr); attr->inner_ipv4_ihl = MLX5_GET (flow_table_nic_cap, hcattr, diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index 3747ef9..e4086a1 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -257,6 +257,7 @@ struct mlx5_hca_attr { uint32_t crypto_wrapped_import_method:1; uint16_t esw_mgr_vport_id; /* E-Switch Mgr vport ID . */ uint16_t max_wqe_sz_sq; + uint32_t modify_outer_ip_ecn:1; }; /* LAG Context. */ diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index bc3e70a..a07d233 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -744,6 +744,7 @@ enum mlx5_modification_field { MLX5_MODI_OUT_TCP_ACK_NUM, MLX5_MODI_IN_TCP_ACK_NUM = 0x5C, MLX5_MODI_GTP_TEID = 0x6E, + MLX5_MODI_OUT_IP_ECN = 0x73, }; /* Total number of metadata reg_c's. */ @@ -1888,6 +1889,62 @@ struct mlx5_ifc_roce_caps_bits { u8 reserved_at_20[0x7e0]; }; +struct mlx5_ifc_ft_fields_support_bits { + u8 outer_dmac[0x1]; + u8 outer_smac[0x1]; + u8 outer_ether_type[0x1]; + u8 reserved_at_3[0x1]; + u8 outer_first_prio[0x1]; + u8 outer_first_cfi[0x1]; + u8 outer_first_vid[0x1]; + u8 reserved_at_7[0x1]; + u8 outer_second_prio[0x1]; + u8 outer_second_cfi[0x1]; + u8 outer_second_vid[0x1]; + u8 reserved_at_b[0x1]; + u8 outer_sip[0x1]; + u8 outer_dip[0x1]; + u8 outer_frag[0x1]; + u8 outer_ip_protocol[0x1]; + u8 outer_ip_ecn[0x1]; + u8 outer_ip_dscp[0x1]; + u8 outer_udp_sport[0x1]; + u8 outer_udp_dport[0x1]; + u8 outer_tcp_sport[0x1]; + u8 outer_tcp_dport[0x1]; + u8 outer_tcp_flags[0x1]; + u8 outer_gre_protocol[0x1]; + u8 outer_gre_key[0x1]; + u8 outer_vxlan_vni[0x1]; + u8 reserved_at_1a[0x5]; + u8 source_eswitch_port[0x1]; + u8 inner_dmac[0x1]; + u8 inner_smac[0x1]; + u8 inner_ether_type[0x1]; + u8 reserved_at_23[0x1]; + u8 inner_first_prio[0x1]; + u8 inner_first_cfi[0x1]; + u8 inner_first_vid[0x1]; + u8 reserved_at_27[0x1]; + u8 inner_second_prio[0x1]; + u8 inner_second_cfi[0x1]; + u8 inner_second_vid[0x1]; + u8 reserved_at_2b[0x1]; + u8 inner_sip[0x1]; + u8 inner_dip[0x1]; + u8 inner_frag[0x1]; + u8 inner_ip_protocol[0x1]; + u8 inner_ip_ecn[0x1]; + u8 inner_ip_dscp[0x1]; + u8 inner_udp_sport[0x1]; + u8 inner_udp_dport[0x1]; + u8 inner_tcp_sport[0x1]; + u8 inner_tcp_dport[0x1]; + u8 inner_tcp_flags[0x1]; + u8 reserved_at_37[0x9]; + u8 reserved_at_40[0x40]; +}; + /* * Table 1872 - Flow Table Fields Supported 2 Format */ @@ -1927,7 +1984,10 @@ struct mlx5_ifc_flow_table_nic_cap_bits { flow_table_properties_nic_transmit_rdma; struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer; - u8 reserved_at_e00[0x600]; + u8 reserved_at_e00[0x200]; + struct mlx5_ifc_ft_fields_support_bits + ft_header_modify_nic_receive; + u8 reserved_at_1080[0x380]; struct mlx5_ifc_ft_fields_support_2_bits ft_field_support_2_nic_receive; }; -- 1.8.3.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [v2 2/3] net/mlx5: add support to modify ECN field 2022-06-07 11:18 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Sean Zhang 2022-06-07 11:18 ` [v2 1/3] common/mlx5: add modify ECN capability check Sean Zhang @ 2022-06-07 11:18 ` Sean Zhang 2022-06-07 11:19 ` [v2 3/3] net/mlx5: add modify field support in meter Sean Zhang 2022-06-14 7:45 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Raslan Darawsheh 3 siblings, 0 replies; 9+ messages in thread From: Sean Zhang @ 2022-06-07 11:18 UTC (permalink / raw) To: thomas, Matan Azrad, Viacheslav Ovsiienko; +Cc: dev This patch is to support modify ECN field in IPv4/IPv6 header. Signed-off-by: Sean Zhang <xiazhang@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> --- doc/guides/nics/mlx5.rst | 1 + doc/guides/rel_notes/release_22_07.rst | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 20 ++++++++++++++++++++ 3 files changed, 22 insertions(+) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index d83c56d..7ecf11e 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -93,6 +93,7 @@ Features - Connection tracking. - Sub-Function representors. - Sub-Function. +- Modify IPv4/IPv6 ECN field. Limitations diff --git a/doc/guides/rel_notes/release_22_07.rst b/doc/guides/rel_notes/release_22_07.rst index d46f773..a2a8cf0 100644 --- a/doc/guides/rel_notes/release_22_07.rst +++ b/doc/guides/rel_notes/release_22_07.rst @@ -116,6 +116,7 @@ New Features * Added support for promiscuous mode on Windows. * Added support for MTU on Windows. * Added matching and RSS on IPsec ESP. + * Added support for modifying ECN field of IPv4/IPv6. * **Updated VMware vmxnet3 networking driver.** diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index a575e31..0f028de 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1450,6 +1450,9 @@ struct field_modify_info modify_tcp[] = { case RTE_FLOW_FIELD_POINTER: case RTE_FLOW_FIELD_VALUE: return inherit < 0 ? 0 : inherit; + case RTE_FLOW_FIELD_IPV4_ECN: + case RTE_FLOW_FIELD_IPV6_ECN: + return 2; default: MLX5_ASSERT(false); } @@ -1827,6 +1830,13 @@ struct field_modify_info modify_tcp[] = { (meta_count - width)) & meta_mask); } break; + case RTE_FLOW_FIELD_IPV4_ECN: + case RTE_FLOW_FIELD_IPV6_ECN: + info[idx] = (struct field_modify_info){1, 0, + MLX5_MODI_OUT_IP_ECN}; + if (mask) + mask[idx] = 0x3 >> (2 - width); + break; case RTE_FLOW_FIELD_POINTER: case RTE_FLOW_FIELD_VALUE: default: @@ -4826,6 +4836,7 @@ struct mlx5_list_entry * int ret = 0; struct mlx5_priv *priv = dev->data->dev_private; struct mlx5_sh_config *config = &priv->sh->config; + struct mlx5_hca_attr *hca_attr = &priv->sh->cdev->config.hca_attr; const struct rte_flow_action_modify_field *action_modify_field = action->conf; uint32_t dst_width = mlx5_flow_item_field_width(dev, @@ -4953,6 +4964,15 @@ struct mlx5_list_entry * RTE_FLOW_ERROR_TYPE_ACTION, action, "add and sub operations" " are not supported"); + if (action_modify_field->dst.field == RTE_FLOW_FIELD_IPV4_ECN || + action_modify_field->src.field == RTE_FLOW_FIELD_IPV4_ECN || + action_modify_field->dst.field == RTE_FLOW_FIELD_IPV6_ECN || + action_modify_field->src.field == RTE_FLOW_FIELD_IPV6_ECN) + if (!hca_attr->modify_outer_ip_ecn && + !attr->transfer && !attr->group) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifications of the ECN for current firmware is not supported"); return (action_modify_field->width / 32) + !!(action_modify_field->width % 32); } -- 1.8.3.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [v2 3/3] net/mlx5: add modify field support in meter 2022-06-07 11:18 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Sean Zhang 2022-06-07 11:18 ` [v2 1/3] common/mlx5: add modify ECN capability check Sean Zhang 2022-06-07 11:18 ` [v2 2/3] net/mlx5: add support to modify ECN field Sean Zhang @ 2022-06-07 11:19 ` Sean Zhang 2022-06-14 7:45 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Raslan Darawsheh 3 siblings, 0 replies; 9+ messages in thread From: Sean Zhang @ 2022-06-07 11:19 UTC (permalink / raw) To: thomas, Matan Azrad, Viacheslav Ovsiienko; +Cc: dev This patch introduces MODIFY_FIELD action support in meter. User can create meter policy with MODIFY_FIELD action in green/yellow action. For example: testpmd> add port meter policy 0 21 g_actions modify_field op set dst_type ipv4_ecn src_type value src_value 3 width 2 / ... Signed-off-by: Sean Zhang <xiazhang@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> --- doc/guides/nics/mlx5.rst | 4 ++-- drivers/net/mlx5/mlx5_flow.c | 5 +++- drivers/net/mlx5/mlx5_flow.h | 2 ++ drivers/net/mlx5/mlx5_flow_dv.c | 49 ++++++++++++++++++++++++++++++++++---- drivers/net/mlx5/mlx5_flow_meter.c | 2 +- 5 files changed, 54 insertions(+), 8 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 7ecf11e..3c9015f 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -445,8 +445,8 @@ Limitations - yellow: NULL or END. - RED: DROP / END. - The only supported meter policy actions: - - green: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MARK, METER and SET_TAG. - - yellow: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MARK, METER and SET_TAG. + - green: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MODIFY_FIELD, MARK, METER and SET_TAG. + - yellow: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MODIFY_FIELD, MARK, METER and SET_TAG. - RED: must be DROP. - Policy actions of RSS for green and yellow should have the same configuration except queues. - Policy with RSS/queue action is not supported when ``dv_xmeta_en`` enabled. diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 5d6c321..090de03 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -7910,6 +7910,8 @@ struct mlx5_flow_workspace* * Meter policy struct. * @param[in] action * Action specification used to create meter actions. + * @param[in] attr + * Flow rule attributes. * @param[out] error * Perform verbose error reporting if not NULL. Initialized in case of * error only. @@ -7921,12 +7923,13 @@ struct mlx5_flow_workspace* mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev, struct mlx5_flow_meter_policy *mtr_policy, const struct rte_flow_action *actions[RTE_COLORS], + struct rte_flow_attr *attr, struct rte_mtr_error *error) { const struct mlx5_flow_driver_ops *fops; fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); - return fops->create_mtr_acts(dev, mtr_policy, actions, error); + return fops->create_mtr_acts(dev, mtr_policy, actions, attr, error); } /** diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index eb13365..c3a554c 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -1375,6 +1375,7 @@ typedef int (*mlx5_flow_create_mtr_acts_t) (struct rte_eth_dev *dev, struct mlx5_flow_meter_policy *mtr_policy, const struct rte_flow_action *actions[RTE_COLORS], + struct rte_flow_attr *attr, struct rte_mtr_error *error); typedef void (*mlx5_flow_destroy_mtr_acts_t) (struct rte_eth_dev *dev, @@ -2033,6 +2034,7 @@ void mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev, int mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev, struct mlx5_flow_meter_policy *mtr_policy, const struct rte_flow_action *actions[RTE_COLORS], + struct rte_flow_attr *attr, struct rte_mtr_error *error); int mlx5_flow_create_policy_rules(struct rte_eth_dev *dev, struct mlx5_flow_meter_policy *mtr_policy); diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 0f028de..db9c831 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -15713,6 +15713,8 @@ struct rte_flow_action_handle * * Meter policy struct. * @param[in] action * Action specification used to create meter actions. + * @param[in] attr + * Pointer to the flow attributes. * @param[out] error * Perform verbose error reporting if not NULL. Initialized in case of * error only. @@ -15724,6 +15726,7 @@ struct rte_flow_action_handle * __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev, struct mlx5_flow_meter_policy *mtr_policy, const struct rte_flow_action *actions[RTE_COLORS], + struct rte_flow_attr *attr, enum mlx5_meter_domain domain, struct rte_mtr_error *error) { @@ -16020,6 +16023,28 @@ struct rte_flow_action_handle * action_flags |= MLX5_FLOW_ACTION_JUMP; break; } + case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: + { + if (i >= MLX5_MTR_RTE_COLORS) + return -rte_mtr_error_set(error, + ENOTSUP, + RTE_MTR_ERROR_TYPE_METER_POLICY, + NULL, + "cannot create policy modify field for this color"); + if (flow_dv_convert_action_modify_field + (dev, mhdr_res, act, attr, &flow_err)) + return -rte_mtr_error_set(error, + ENOTSUP, + RTE_MTR_ERROR_TYPE_METER_POLICY, + NULL, "cannot setup policy modify field action"); + if (!mhdr_res->actions_num) + return -rte_mtr_error_set(error, + ENOTSUP, + RTE_MTR_ERROR_TYPE_METER_POLICY, + NULL, "cannot find policy modify field action"); + action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD; + break; + } /* * No need to check meter hierarchy for R colors * here since it is done in the validation stage. @@ -16092,7 +16117,8 @@ struct rte_flow_action_handle * RTE_MTR_ERROR_TYPE_METER_POLICY, NULL, "action type not supported"); } - if (action_flags & MLX5_FLOW_ACTION_SET_TAG) { + if ((action_flags & MLX5_FLOW_ACTION_SET_TAG) || + (action_flags & MLX5_FLOW_ACTION_MODIFY_FIELD)) { /* create modify action if needed. */ dev_flow.dv.group = 1; if (flow_dv_modify_hdr_resource_register @@ -16100,8 +16126,7 @@ struct rte_flow_action_handle * return -rte_mtr_error_set(error, ENOTSUP, RTE_MTR_ERROR_TYPE_METER_POLICY, - NULL, "cannot register policy " - "set tag action"); + NULL, "cannot register policy set tag/modify field action"); act_cnt->modify_hdr = dev_flow.handle->dvh.modify_hdr; } @@ -16121,6 +16146,8 @@ struct rte_flow_action_handle * * Meter policy struct. * @param[in] action * Action specification used to create meter actions. + * @param[in] attr + * Pointer to the flow attributes. * @param[out] error * Perform verbose error reporting if not NULL. Initialized in case of * error only. @@ -16132,6 +16159,7 @@ struct rte_flow_action_handle * flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev, struct mlx5_flow_meter_policy *mtr_policy, const struct rte_flow_action *actions[RTE_COLORS], + struct rte_flow_attr *attr, struct rte_mtr_error *error) { int ret, i; @@ -16143,7 +16171,7 @@ struct rte_flow_action_handle * MLX5_MTR_SUB_POLICY_NUM_MASK; if (sub_policy_num) { ret = __flow_dv_create_domain_policy_acts(dev, - mtr_policy, actions, + mtr_policy, actions, attr, (enum mlx5_meter_domain)i, error); /* Cleaning resource is done in the caller level. */ if (ret) @@ -18395,6 +18423,19 @@ struct rte_flow_action_handle * MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY; next_mtr = mtr; break; + case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: + ret = flow_dv_validate_action_modify_field(dev, + action_flags[i], act, attr, &flow_err); + if (ret < 0) + return -rte_mtr_error_set(error, + ENOTSUP, + RTE_MTR_ERROR_TYPE_METER_POLICY, + NULL, flow_err.message ? + flow_err.message : + "Modify field action validate check fail"); + ++actions_n; + action_flags[i] |= MLX5_FLOW_ACTION_MODIFY_FIELD; + break; default: return -rte_mtr_error_set(error, ENOTSUP, RTE_MTR_ERROR_TYPE_METER_POLICY, diff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c index 22f6ca7..7c0d849 100644 --- a/drivers/net/mlx5/mlx5_flow_meter.c +++ b/drivers/net/mlx5/mlx5_flow_meter.c @@ -916,7 +916,7 @@ struct mlx5_flow_meter_policy * } rte_spinlock_init(&mtr_policy->sl); ret = mlx5_flow_create_mtr_acts(dev, mtr_policy, - policy->actions, error); + policy->actions, &attr, error); if (ret) goto policy_add_err; if (mtr_policy->is_hierarchy) { -- 1.8.3.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header 2022-06-07 11:18 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Sean Zhang ` (2 preceding siblings ...) 2022-06-07 11:19 ` [v2 3/3] net/mlx5: add modify field support in meter Sean Zhang @ 2022-06-14 7:45 ` Raslan Darawsheh 3 siblings, 0 replies; 9+ messages in thread From: Raslan Darawsheh @ 2022-06-14 7:45 UTC (permalink / raw) To: Sean Zhang (Networking SW), NBU-Contact-Thomas Monjalon (EXTERNAL); +Cc: dev Hi, > -----Original Message----- > From: Sean Zhang <xiazhang@nvidia.com> > Sent: Tuesday, June 7, 2022 2:19 PM > To: NBU-Contact-Thomas Monjalon (EXTERNAL) <thomas@monjalon.net> > Cc: dev@dpdk.org > Subject: [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header > > This patch set adds support for modifying ECN fields in IPv4/IPv6 header, and > also adds support for modify_filed action in meter. > > --- > v2 --- rebase and add missing doc > --- > Sean Zhang (3): > common/mlx5: add modify ECN capability check > net/mlx5: add support to modify ECN field > net/mlx5: add modify field support in meter > > doc/guides/nics/mlx5.rst | 5 ++- > doc/guides/rel_notes/release_22_07.rst | 1 + > drivers/common/mlx5/mlx5_devx_cmds.c | 3 ++ > drivers/common/mlx5/mlx5_devx_cmds.h | 1 + > drivers/common/mlx5/mlx5_prm.h | 62 > +++++++++++++++++++++++++++++- > drivers/net/mlx5/mlx5_flow.c | 5 ++- > drivers/net/mlx5/mlx5_flow.h | 2 + > drivers/net/mlx5/mlx5_flow_dv.c | 69 > ++++++++++++++++++++++++++++++++-- > drivers/net/mlx5/mlx5_flow_meter.c | 2 +- > 9 files changed, 141 insertions(+), 9 deletions(-) > > -- > 1.8.3.1 Series applied to next-net-mlx, Kindest regards, Raslan Darawsheh ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-06-14 7:45 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-04-02 6:40 [v1] net/mlx5: support represented port item Sean Zhang 2022-06-06 7:21 ` Slava Ovsiienko 2022-06-07 11:17 ` [v2] " Sean Zhang 2022-06-14 7:44 ` Raslan Darawsheh 2022-06-07 11:18 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Sean Zhang 2022-06-07 11:18 ` [v2 1/3] common/mlx5: add modify ECN capability check Sean Zhang 2022-06-07 11:18 ` [v2 2/3] net/mlx5: add support to modify ECN field Sean Zhang 2022-06-07 11:19 ` [v2 3/3] net/mlx5: add modify field support in meter Sean Zhang 2022-06-14 7:45 ` [v2 0/3] Add support for modifying ECN in IPv4/IPv6 header Raslan Darawsheh
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