Hi,

> -----Original Message-----
> From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
> Sent: Wednesday, March 2, 2022 5:31 PM
> To: Slava Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Ori Kam <orika@nvidia.com>; Yongseok Koh
> <yskoh@mellanox.com>; Ori Kam <orika@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>;
> stable@dpdk.org
> Subject: [PATCH v4] net/mlx5: fix the NIC egress flow mismatch in switchdev
> mode
> 
> When E-Switch mode was enabled, the NIC egress flows was implicitly
> appended with source vport to match on. If the metadata register C0
> was used to maintain the source vport, it was initialized to zero
> on packet steering engine entry, the flow could be hit only
> if source vport was zero, the register C0 of the packet was not correct
> to match in the TX side, this caused egress flow misses.
> 
> This patch:
>  - removes the implicit source vport match for NIC egress flow.
>  - rejects the NIC egress flows on the representor ports at validation.
>  - allows the internal NIC egress flows containing the TX_QUEUE items in
>    order to not impact hairpins.
> 
> Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> Acked-by: Ori Kam <orika@nvidia.com>
> ---
> v4: rebase
> v3: update the tx_item checking
> v2: fix one typo

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh