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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 4cd34689-ce01-47f7-20bf-08d6f2f956be X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Jun 2019 07:56:43.3704 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jerinj@marvell.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR18MB3079 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-17_05:, , signatures=0 Subject: Re: [dpdk-dev] [PATCH 06/44] event/octeontx2: allocate event inflight buffers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: pbhagavatula@marvell.com > Sent: Sunday, June 2, 2019 12:23 AM > To: Jerin Jacob Kollanukkaran ; Pavan Nikhilesh > Bhagavatula > Cc: dev@dpdk.org > Subject: [dpdk-dev] [PATCH 06/44] event/octeontx2: allocate event infligh= t > buffers >=20 > From: Pavan Nikhilesh >=20 > Allocate buffers in DRAM that hold inflight events. >=20 > Signed-off-by: Pavan Nikhilesh > --- >=20 > +static int > +sso_xaq_allocate(struct otx2_sso_evdev *dev) { > + const struct rte_memzone *mz; > + struct npa_aura_s *aura; > + static int reconfig_cnt; > + char pool_name[30]; Use RTE_MEMZONE_NAMESIZE > + if (mz =3D=3D NULL) { > + otx2_err("failed to allocate mem for fcmem"); > + return -ENOMEM; > + } > + > + dev->fc_iova =3D mz->iova; > + dev->fc_mem =3D mz->addr; > + > + aura =3D (struct npa_aura_s *)((uintptr_t)dev->fc_mem + OTX2_ALIGN); > + memset(aura, 0, sizeof(struct npa_aura_s)); > + > + aura->fc_ena =3D 1; > + aura->fc_addr =3D dev->fc_iova; > + aura->fc_hyst_bits =3D 0; /* Store count on all updates */ > + > + /* Taken from HRM 14.3.3(4) */ > + xaq_cnt =3D dev->nb_event_queues * OTX2_SSO_XAQ_CACHE_CNT; > + xaq_cnt +=3D (dev->iue / dev->xae_waes) + > + (OTX2_SSO_XAQ_SLACK * dev->nb_event_queues); > + > + otx2_sso_dbg("configuring %d xaq buffers", xaq_cnt); > + /* Setup XAQ based on number of nb queues. */ > + snprintf(pool_name, 30, "otx2_xaq_buf_pool_%d", reconfig_cnt); > + dev->xaq_pool =3D (void *)rte_mempool_create_empty(pool_name, > + xaq_cnt, dev->xaq_buf_size, 0, 0, > + rte_socket_id(), 0); > + > + if (dev->xaq_pool =3D=3D NULL) { > + otx2_err("unable to create empty mempool."); > + rte_memzone_free(mz); > + return -ENOMEM; > + } > + > + rc =3D rte_mempool_set_ops_byname(dev->xaq_pool, > + rte_mbuf_platform_mempool_ops(), > aura); > + if (rc !=3D 0) { > + otx2_err("unable to set xaqpool ops."); > + goto alloc_fail; > + } > + > + rc =3D rte_mempool_populate_default(dev->xaq_pool); > + if (rc < 0) { > + otx2_err("unable to set populate xaqpool."); > + goto alloc_fail; > + } > + reconfig_cnt++; > + dev->xaq_lmt =3D xaq_cnt - (OTX2_SSO_XAQ_SLACK / 2 * > + dev->nb_event_queues); Add comment on why divide by 2.