Re: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine specific flags

[Jerin Jacob Kollanukkaran <jerinj@marvell.com>]

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Sunday, April 14, 2019 11:14 PM
> To: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>
> Cc: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; dev@dpdk.org;
> jerinjacobk@gmail.com; yskoh@mellanox.com; bruce.richardson@intel.com
> Subject: Re: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine
> specific flags
> 
> 14/04/2019 16:40, Pavan Nikhilesh Bhagavatula:
> > Hi Thomas,
> >
> > There is no guarantee of primary part number (machine names) uniqueness
> between implementors.
> 
> I think we don't speak the same language :) By machine name, I mean what we
> set in RTE_MACHINE, like octeontx2.

As you know, The system probes "implementor_id" and "implementor_pn"
Values. There is nothing like machine name in meson and in order to keep 
Synergy with native build, we need to just follow, "implementor_id"
and "implementor_pn". Now, it is possible to have "implemetor_id" to
"implementor_pn"  to machine name lookup but Unlike, "make"  based
Build system, meson supports supporting a lot of machines(like RTE_MACHINE),
with that structure. So converting to another intermediate called "machine string"
will have more overhead IMO.

['0xa1', ['-mcpu=thunderxt88']],
['0xa2', ['-mcpu=thunderxt81']],
['0xa3', ['-mcpu=thunderxt83']]]
['0xd03', ['-mcpu=cortex-a53']],
['0xd04', ['-mcpu=cortex-a35']],
['0xd05', ['-mcpu=cortex-a55']],
['0xd07', ['-mcpu=cortex-a57']],
['0xd08', ['-mcpu=cortex-a72']],
['0xd09', ['-mcpu=cortex-a73']],
['0xd0a', ['-mcpu=cortex-a75']],
['0xd0b', ['-mcpu=cortex-a76']]
impl_0x41 = ['Arm', flags_generic, machine_args_generic]
impl_0x42 = ['Broadcom', flags_generic, machine_args_generic]
impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
impl_0x44 = ['DEC', flags_generic, machine_args_generic]
impl_0x49 = ['Infineon', flags_generic, machine_args_generic]
impl_0x4d = ['Motorola', flags_generic, machine_args_generic]
impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic]
impl_0x50 = ['AppliedMicro', flags_generic, machine_args_generic]
impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic]
impl_0x53 = ['Samsung', flags_generic, machine_args_generic]
impl_0x56 = ['Marvell', flags_generic, machine_args_generic]
impl_0x69 = ['Intel', flags_generic, machine_args_generic]
impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic]
impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, machine_args_generic]



> 
> > If we limit lookups to only machine names through primary part number we
> would have a lot of repetitive defines.
> > Also, moving the arrays into the python script is not feasible as
> > meson needs to reparse the standard out from the python script
> 
> I will probably need to write a PoC.

Yes. Please


> 
> > Currently, config is split into three parts :
> > 	1. Implementor specific defines.
> > 	2. Micro-arch specific compiler flags.
> > 	3. Micro-arch specific defines.
> 
> This is currently unreadable in my opinion.

Bit  subjective.
If we want to keep all the fine grained control along with
"native" /"cross" build,  "distribution" build, cache line
differences etc, makes it bit difficult.

But if you think, it can be improved. Please share patch,
We are happy to review and test in  the platforms we have.

> > I think from a configurability point of view the above three are really
> important for fine grained control.
> 
> I agree fine grain is required.
> 
> 
> > Thoughts?
> >
> > Regards,
> > Pavan.
> >
> > >-----Original Message-----
> > >From: Thomas Monjalon <thomas@monjalon.net>
> > >Sent: Sunday, April 14, 2019 2:13 AM
> > >To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>
> > >Cc: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>;
> > >dev@dpdk.org; jerinjacobk@gmail.com; yskoh@mellanox.com;
> > >bruce.richardson@intel.com
> > >Subject: Re: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support
> > >machine specific flags
> > >
> > >13/04/2019 08:24, Jerin Jacob Kollanukkaran:
> > >> > I was not confortable with this patch without being able to say why.
> > >> > Yesterday I spent more time to understand and see what may be
> improved.
> > >> > I agree it is late, so it won't block this patch for 19.05.
> > >> > Do you agree this file can be improved?
> > >>
> > >> Moving to  the all to static config file is an option but we lose
> > >> the flexibility of runtime detecting the options and few of them
> > >> are probing at runtime based on gcc versions and mcpu combination etc.
> > >
> > >I think there is a misunderstanding.
> > >I'm suggesting to symplify arrays by indexing only by machine name.
> > >It should not change the behaviour.
> > >
> > >> I am not expert in meson area and not sure meson/python has better
> > >> data strcture for this other than list/array combo. If Bruce has
> > >> any feedback on this, then we will try to prototype it.
> > >>
> > >> > Please would you like to look at reworking during next cycle?
> > >> > Thanks
> > >
> > >
> >
> >
> 
> 
> 
>