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H:BYAPR18MB2424.namprd18.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: Nnpnu4unVZPxqLNfdZNm9YJr6/yDeeLgqByD0Qd3gusGSeUFQjhPL+vT4gBePinwIx/hVnv+tdf8sf9W2oIMoLhWGHNM3rWae69CDEM3zHug1DUfNRoajRux0t55R8gHahhuccB/s+vX/Iw6a3qMfXhqC2OWsVzNb+DOPdZFikhYzPJFKaE6SCVg4PkZP/IeVgdwzlQuEVDQXrk8wJv2PA42iuLRuHsTVkCpspYSu8NwBXlXlc+p0DBcaQLjcgB0IHJXSMrdJi+bOEwbr4qD/b5qvDZUvHUEdmcbYnhGSMTA5UGnA5Y0WfmaUVfBD6gm9xsClGgJ0FZWttQ5/D6MCBmtHQ6SLLOOy1UL1tOlbL8PN1SfjCPtjmcq3ClMTy4gq+W/eDarEphoNlC+FDSnnTo0qh8xcaH99BuyUDFhjMQ= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 9147e4db-e8fa-4a23-5c39-08d70a7e101e X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Jul 2019 06:14:44.6647 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jerinj@marvell.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR18MB2806 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:5.22.84,1.0.8 definitions=2019-07-17_02:2019-07-16,2019-07-17 signatures=0 Subject: Re: [dpdk-dev] [RFC PATCH v3 2/3] eal: add mask and unmask interrupt APIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Hyong Youb Kim (hyonkim) > Sent: Wednesday, July 17, 2019 11:26 AM > To: Nithin Kumar Dabilpuram ; David Marchand > ; Thomas Monjalon > ; Ferruh Yigit ; Bruce > Richardson > Cc: Jerin Jacob Kollanukkaran ; John Daley (johndale) > ; Shahed Shaikh ; > dev@dpdk.org > Subject: RE: [RFC PATCH v3 2/3] eal: add mask and unmask interrupt APIs > > +rte_intr_mask(const struct rte_intr_handle *intr_handle) { > > + if (intr_handle && intr_handle->type =3D=3D RTE_INTR_HANDLE_VDEV) > > + return 0; > > + > > + if (!intr_handle || intr_handle->fd < 0 || intr_handle->uio_cfg_fd < > 0) > > + return -1; > > + > > + switch (intr_handle->type){ > > + /* Both masking and disabling are same for UIO */ > > + case RTE_INTR_HANDLE_UIO: > > + if (uio_intr_disable(intr_handle)) > > + return -1; > > + break; > > + case RTE_INTR_HANDLE_UIO_INTX: > > + if (uio_intx_intr_disable(intr_handle)) > > + return -1; > > + break; > > + /* not used at this moment */ > > + case RTE_INTR_HANDLE_ALARM: > > + return -1; > > +#ifdef VFIO_PRESENT > > + case RTE_INTR_HANDLE_VFIO_MSIX: > > + case RTE_INTR_HANDLE_VFIO_MSI: > > + return 0; >=20 > Isn't this a little confusing? It returns success, but irq is not masked. Yes. How about changing the API to rte_intr_ack()(Acknowledge the interrupt= ) Or something similar? i.e replace rte_intr_unmask() with rte_intr_ack() for= this use case. =20 > As is, return code 0 means... > - igb_uio: irq is masked for INTx, MSI, MSI-X > - vfio-pci + INTx: irq is masked > - vfio-pci + MSI/MSI-X: no changes >=20 > Masking is useful only for INTx, IMO... >=20 > Masking MSI/MSI-X via PCI-defined mechanisms (e.g. Mask bit in MSI-X > Table) has no practical use for drivers. Handshaking/masking/unmasking is > done via device/vendor specific ways, as needed. See all those > ack/block/unblock/credit/... mechanisms used in various drivers/NICs to > control interrupts their own way. >=20 > A long time ago in early PCIe days, the linux kernel did auto-masking for > MSI/MSI-X (i.e. mask before calling netdev irq handler). It was soon remo= ved > as it was unnecessary overhead (expensive PIOs to NIC for every interrupt= ). > Windows and FreeBSD do not do auto-masking either. rte_intr_ack() can abstract FreeBSD and Windows difference.