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Fri, 3 May 2019 10:28:02 +0000 Received: from BYAPR18MB2424.namprd18.prod.outlook.com ([fe80::5827:68d1:b66c:bd2d]) by BYAPR18MB2424.namprd18.prod.outlook.com ([fe80::5827:68d1:b66c:bd2d%3]) with mapi id 15.20.1856.008; Fri, 3 May 2019 10:28:02 +0000 From: Jerin Jacob Kollanukkaran To: Yongseok Koh CC: Honnappa Nagarahalli , "bruce.richardson@intel.com" , "Pavan Nikhilesh Bhagavatula" , Shahaf Shuler , "dev@dpdk.org" , Thomas Monjalon , "Gavin Hu (Arm Technology China)" , nd Thread-Topic: [dpdk-dev] [EXT] [PATCH 5/6] build: add option for armv8 crypto extension Thread-Index: AQHVAT91az0EDTnq3ESYrU9sv1ccqqZZMvcA Date: Fri, 3 May 2019 10:28:02 +0000 Message-ID: References: <20190412232451.30197-1-yskoh@mellanox.com> <20190412232451.30197-6-yskoh@mellanox.com> <8328F59C-14DF-412E-A8F7-6AA1F5061065@mellanox.com> <3ACFB177-32B1-4AF9-BC60-DE1EBB4EC9C7@mellanox.com> <926D3AC3-CA01-410A-8E23-4AB6581FA594@mellanox.com> <76A4CB8C-4429-492D-8885-54B30C64165F@mellanox.com> In-Reply-To: <76A4CB8C-4429-492D-8885-54B30C64165F@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [116.68.105.47] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 219e5cd3-77bb-4883-a9c4-08d6cfb2058c x-microsoft-antispam: BCL:0; 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SRVR:BYAPR18MB2695; H:BYAPR18MB2424.namprd18.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 2GVyuTL9vj/MM58jM5U85tKb21KOBE7H1QplBcwDdV1tXUjg2Kxf/Eq4YwXjuBJtt832J/Md01zbZml3GRnaRH10YFw9y9ZH2XEVilNNonCBkACQvhKoS+J7J0cMQTkr3m3CY8WfbDKvGCU+zQdFFOHrARneX3LQtCxxWqi/fWKhXTwaqiIh3o/WxR0cUqvHkXYXhE+F93uH1Z4KsxfnocpJEfYSIa46NiOqEOSRgFu4i4k0y63GZU6QUVrLYNY00aB9cQg3p/kQ9ydTe3NEDnZblm7hZ08QyJtmwh0jAk+LkIw5ziuoQfhtvb0sCKiXClGHavxz6lpYKjKI2hnPMKaOmoP/FKyRyKJy6ggFC+YFhpTkjBZ+/XcKMEkVaghT8UUfKkbUZ6bvr9cwcHqwNlIlkhwvh12a79Km9PPQyno= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 219e5cd3-77bb-4883-a9c4-08d6cfb2058c X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 10:28:02.2055 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR18MB2695 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-03_04:, , signatures=0 Subject: Re: [dpdk-dev] [EXT] [PATCH 5/6] build: add option for armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 May 2019 10:28:09 -0000 > -----Original Message----- > From: Yongseok Koh > Sent: Friday, May 3, 2019 5:03 AM > To: Jerin Jacob Kollanukkaran > Cc: Honnappa Nagarahalli ; > bruce.richardson@intel.com; Pavan Nikhilesh Bhagavatula > ; Shahaf Shuler ; > dev@dpdk.org; Thomas Monjalon ; Gavin Hu (Arm > Technology China) ; nd > Subject: Re: [dpdk-dev] [EXT] [PATCH 5/6] build: add option for armv8 cry= pto > extension >=20 >=20 > > On May 2, 2019, at 4:08 PM, Yongseok Koh wrote: > > > >> > >> On May 2, 2019, at 3:13 AM, Jerin Jacob Kollanukkaran > wrote: > >> > >>> -----Original Message----- > >>> From: Honnappa Nagarahalli > >>> Sent: Tuesday, April 30, 2019 9:04 AM > >>> To: yskoh@mellanox.com > >>> Cc: Jerin Jacob Kollanukkaran ; > >>> bruce.richardson@intel.com; Pavan Nikhilesh Bhagavatula > >>> ; Shahaf Shuler ; > >>> dev@dpdk.org; thomas@monjalon.net; Gavin Hu (Arm Technology China) > >>> ; Honnappa Nagarahalli > >>> ; nd ; nd > > >>> Subject: RE: [EXT] [PATCH 5/6] build: add option for armv8 crypto > >>> extension > >>> > >>>> On Apr 15, 2019, at 1:13 PM, Honnappa Nagarahalli > >>>> wrote: > >>>> > >>>>>>>> Subject: [EXT] [PATCH 5/6] build: add option for armv8 crypto > >>>>>>>> extension > >>>>>>>> > >>>>>>>> CONFIG_RTE_MACHINE=3D"armv8a" > >>>>>>>> +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dy > >>>>>>> > >>>>>>> This approach is not scalable. Even, it is not good for > >>>>>>> BlueField as you you need to maintain two images. > >>>>>>> > >>>>>>> Unlike other CPU flags, arm64's crypto cpu flag is really _option= al_. > >>>>>>> Access to crypto instructions is always at under runtime check. > >>>>>>> See the following in rte_armv8_pmd.c > >>>>>>> > >>>>>>> > >>>>>>> /* Check CPU for support for AES instruction set */ if > >>>>>>> (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) { > >>>>>>> ARMV8_CRYPTO_LOG_ERR( > >>>>>>> "AES instructions not supported by CPU"); > >>>>>>> return -EFAULT; > >>>>>>> } > >>>>>>> > >>>>>>> /* Check CPU for support for SHA instruction set */ if > >>>>>>> (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_SHA1) || > >>>>>>> !rte_cpu_get_flag_enabled(RTE_CPUFLAG_SHA2)) { > >>>>>>> ARMV8_CRYPTO_LOG_ERR( > >>>>>>> "SHA1/SHA2 instructions not supported by CPU"); > >>>>>>> return -EFAULT; > >>>>>>> } > >>>>>>> > >>>>>>> So In order to avoid one more config flags specific to armv8 in > >>>>>>> meson and makefile build infra And avoid the need for 6/6 patch. > >>>>>>> IMO, # Introduce optional CPU flag scheme in eal. Treat armv8 > >>>>>>> crypto as optional flag # Skip the eal init check for optional fl= ag. > >>>>>>> > >>>>>>> Do you see any issues with that approach? > >>>>>> > >>>>>> I also thought about that approach and that was my number 1 priori= ty. > >>>>>> But, I had one question came to my mind. Maybe, arm people can > >>>>>> confirm it. Is it 100% guaranteed that compiler never makes use > >>>>>> of any of crypto instructions even if there's no specific > >>>>>> asm/intrinsic code? The crypto extension has aes, pmull, > >>>>>> sha1 and sha2. In case of rte_memcpy() for x86, for example, > >>>>>> compiler may optimize code using avx512f instructions even though > >>>>>> it is written specifically with avx2 intrinsics (__mm256_*) > >>>>>> unless avx512f is > >>>> disabled. > >>>>>> > >>>>>> If a complier expert in arm (or anyone else) confirm it is > >>>>>> completely **optional**, then I'd love to take that approach for s= ure. > >>>>>> > >>>>>> Copied dpdk-on-arm ML. > >>>>>> > >>>>> I do not know the answer, will have to check with the compiler team= . > >>>>> I will get > >>>> back on this. > >>>> > >>>> Any update yet? > >>> Currently, enabling 'crypto' flag will generate the crypto > >>> instructions only when crypto intrinsics are used. However, when > >>> 'sha3' (part of 8.2 crypto) flag is > >> > >> The default image is 8.1 spec and except octeontx2 every other SoC is > >> 8.1 and For octeotx2 crypto is supported. If so, Should we worry this = case? > > > > Right, it sounds to me that we can disable the option without having > > the new config flag until such instructions get needed. According to > > gcc-8 release note [1], currently '+crypto' implies '+aes' and '+sha2' > > while '+sha3' and '+sm4' are newly introduced. Given that armv8 crypto > > PMD uses external binary of Marvell. I don't see any reason to enable > > '+crypto'. How about simply disable it from armv8=20 build configs? +1 Yes. Simply disable crypto would be enough for DPDK. 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Fri, 3 May 2019 10:28:02 +0000 Received: from BYAPR18MB2424.namprd18.prod.outlook.com ([fe80::5827:68d1:b66c:bd2d]) by BYAPR18MB2424.namprd18.prod.outlook.com ([fe80::5827:68d1:b66c:bd2d%3]) with mapi id 15.20.1856.008; Fri, 3 May 2019 10:28:02 +0000 From: Jerin Jacob Kollanukkaran To: Yongseok Koh CC: Honnappa Nagarahalli , "bruce.richardson@intel.com" , "Pavan Nikhilesh Bhagavatula" , Shahaf Shuler , "dev@dpdk.org" , Thomas Monjalon , "Gavin Hu (Arm Technology China)" , nd Thread-Topic: [dpdk-dev] [EXT] [PATCH 5/6] build: add option for armv8 crypto extension Thread-Index: AQHVAT91az0EDTnq3ESYrU9sv1ccqqZZMvcA Date: Fri, 3 May 2019 10:28:02 +0000 Message-ID: References: <20190412232451.30197-1-yskoh@mellanox.com> <20190412232451.30197-6-yskoh@mellanox.com> <8328F59C-14DF-412E-A8F7-6AA1F5061065@mellanox.com> <3ACFB177-32B1-4AF9-BC60-DE1EBB4EC9C7@mellanox.com> <926D3AC3-CA01-410A-8E23-4AB6581FA594@mellanox.com> <76A4CB8C-4429-492D-8885-54B30C64165F@mellanox.com> In-Reply-To: <76A4CB8C-4429-492D-8885-54B30C64165F@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [116.68.105.47] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 219e5cd3-77bb-4883-a9c4-08d6cfb2058c x-microsoft-antispam: BCL:0; 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SRVR:BYAPR18MB2695; H:BYAPR18MB2424.namprd18.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 2GVyuTL9vj/MM58jM5U85tKb21KOBE7H1QplBcwDdV1tXUjg2Kxf/Eq4YwXjuBJtt832J/Md01zbZml3GRnaRH10YFw9y9ZH2XEVilNNonCBkACQvhKoS+J7J0cMQTkr3m3CY8WfbDKvGCU+zQdFFOHrARneX3LQtCxxWqi/fWKhXTwaqiIh3o/WxR0cUqvHkXYXhE+F93uH1Z4KsxfnocpJEfYSIa46NiOqEOSRgFu4i4k0y63GZU6QUVrLYNY00aB9cQg3p/kQ9ydTe3NEDnZblm7hZ08QyJtmwh0jAk+LkIw5ziuoQfhtvb0sCKiXClGHavxz6lpYKjKI2hnPMKaOmoP/FKyRyKJy6ggFC+YFhpTkjBZ+/XcKMEkVaghT8UUfKkbUZ6bvr9cwcHqwNlIlkhwvh12a79Km9PPQyno= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 219e5cd3-77bb-4883-a9c4-08d6cfb2058c X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 10:28:02.2055 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR18MB2695 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-03_04:, , signatures=0 Subject: Re: [dpdk-dev] [EXT] [PATCH 5/6] build: add option for armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190503102802.5a8G74PjJuJBViwnoGb84S9jWWOal418NRdiqaKO_pw@z> > -----Original Message----- > From: Yongseok Koh > Sent: Friday, May 3, 2019 5:03 AM > To: Jerin Jacob Kollanukkaran > Cc: Honnappa Nagarahalli ; > bruce.richardson@intel.com; Pavan Nikhilesh Bhagavatula > ; Shahaf Shuler ; > dev@dpdk.org; Thomas Monjalon ; Gavin Hu (Arm > Technology China) ; nd > Subject: Re: [dpdk-dev] [EXT] [PATCH 5/6] build: add option for armv8 cry= pto > extension >=20 >=20 > > On May 2, 2019, at 4:08 PM, Yongseok Koh wrote: > > > >> > >> On May 2, 2019, at 3:13 AM, Jerin Jacob Kollanukkaran > wrote: > >> > >>> -----Original Message----- > >>> From: Honnappa Nagarahalli > >>> Sent: Tuesday, April 30, 2019 9:04 AM > >>> To: yskoh@mellanox.com > >>> Cc: Jerin Jacob Kollanukkaran ; > >>> bruce.richardson@intel.com; Pavan Nikhilesh Bhagavatula > >>> ; Shahaf Shuler ; > >>> dev@dpdk.org; thomas@monjalon.net; Gavin Hu (Arm Technology China) > >>> ; Honnappa Nagarahalli > >>> ; nd ; nd > > >>> Subject: RE: [EXT] [PATCH 5/6] build: add option for armv8 crypto > >>> extension > >>> > >>>> On Apr 15, 2019, at 1:13 PM, Honnappa Nagarahalli > >>>> wrote: > >>>> > >>>>>>>> Subject: [EXT] [PATCH 5/6] build: add option for armv8 crypto > >>>>>>>> extension > >>>>>>>> > >>>>>>>> CONFIG_RTE_MACHINE=3D"armv8a" > >>>>>>>> +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dy > >>>>>>> > >>>>>>> This approach is not scalable. Even, it is not good for > >>>>>>> BlueField as you you need to maintain two images. > >>>>>>> > >>>>>>> Unlike other CPU flags, arm64's crypto cpu flag is really _option= al_. > >>>>>>> Access to crypto instructions is always at under runtime check. > >>>>>>> See the following in rte_armv8_pmd.c > >>>>>>> > >>>>>>> > >>>>>>> /* Check CPU for support for AES instruction set */ if > >>>>>>> (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) { > >>>>>>> ARMV8_CRYPTO_LOG_ERR( > >>>>>>> "AES instructions not supported by CPU"); > >>>>>>> return -EFAULT; > >>>>>>> } > >>>>>>> > >>>>>>> /* Check CPU for support for SHA instruction set */ if > >>>>>>> (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_SHA1) || > >>>>>>> !rte_cpu_get_flag_enabled(RTE_CPUFLAG_SHA2)) { > >>>>>>> ARMV8_CRYPTO_LOG_ERR( > >>>>>>> "SHA1/SHA2 instructions not supported by CPU"); > >>>>>>> return -EFAULT; > >>>>>>> } > >>>>>>> > >>>>>>> So In order to avoid one more config flags specific to armv8 in > >>>>>>> meson and makefile build infra And avoid the need for 6/6 patch. > >>>>>>> IMO, # Introduce optional CPU flag scheme in eal. Treat armv8 > >>>>>>> crypto as optional flag # Skip the eal init check for optional fl= ag. > >>>>>>> > >>>>>>> Do you see any issues with that approach? > >>>>>> > >>>>>> I also thought about that approach and that was my number 1 priori= ty. > >>>>>> But, I had one question came to my mind. Maybe, arm people can > >>>>>> confirm it. Is it 100% guaranteed that compiler never makes use > >>>>>> of any of crypto instructions even if there's no specific > >>>>>> asm/intrinsic code? The crypto extension has aes, pmull, > >>>>>> sha1 and sha2. In case of rte_memcpy() for x86, for example, > >>>>>> compiler may optimize code using avx512f instructions even though > >>>>>> it is written specifically with avx2 intrinsics (__mm256_*) > >>>>>> unless avx512f is > >>>> disabled. > >>>>>> > >>>>>> If a complier expert in arm (or anyone else) confirm it is > >>>>>> completely **optional**, then I'd love to take that approach for s= ure. > >>>>>> > >>>>>> Copied dpdk-on-arm ML. > >>>>>> > >>>>> I do not know the answer, will have to check with the compiler team= . > >>>>> I will get > >>>> back on this. > >>>> > >>>> Any update yet? > >>> Currently, enabling 'crypto' flag will generate the crypto > >>> instructions only when crypto intrinsics are used. However, when > >>> 'sha3' (part of 8.2 crypto) flag is > >> > >> The default image is 8.1 spec and except octeontx2 every other SoC is > >> 8.1 and For octeotx2 crypto is supported. If so, Should we worry this = case? > > > > Right, it sounds to me that we can disable the option without having > > the new config flag until such instructions get needed. According to > > gcc-8 release note [1], currently '+crypto' implies '+aes' and '+sha2' > > while '+sha3' and '+sm4' are newly introduced. Given that armv8 crypto > > PMD uses external binary of Marvell. I don't see any reason to enable > > '+crypto'. How about simply disable it from armv8=20 build configs? +1 Yes. Simply disable crypto would be enough for DPDK.