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SRVR:BYAPR18MB2453; H:BYAPR18MB2424.namprd18.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: x8nGmxGD8TqhO1xr+KSRB4grB2E0hBQpGQX4WMpNcXcUa4zHU9YZFAGkySd4rBItMZHO6lcHnyn3DgyBL7vJKGBcMFUK9F1gmvJkHssUBPeGM2u2dmxGV1nJ1W05Z7DfYr7QkbFmNJHrITrMF42o3xSh84sLcns5tNNOGQDbC8tQMSbBu5Q0WbjXft5r0jaVQChuTjYgfuBKruZUG1Q0Enc/A+1Uq3Hs8qUYN5Iu56te2Pk0FL6Gx64+Xc3vYVOq+eL+gZvjmSn7myMYPboSi+n41q/c5qNaP0lk1cTvjnocjlA0Ixby3+76g1MOvx3rWYnsuA8G2cBk0kNch57lHgbko+bRQ+UWB9mpHGqF1lNlskCydT36VvpS/1WV0KeBod7A08pbLeEo8Fy0BiMSdtwJxxczh2i1ndx23hV+ZFU= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 4847d4b8-b297-4a3a-ee78-08d70ec5ad74 X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Jul 2019 16:57:27.5443 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jerinj@marvell.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR18MB2453 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:5.22.84,1.0.8 definitions=2019-07-22_13:2019-07-22,2019-07-22 signatures=0 Subject: Re: [dpdk-dev] [EXT] [PATCH v6 1/3] eal/arm64: add 128-bit atomic compare exchange X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Phil Yang > Sent: Monday, July 22, 2019 9:53 PM > To: dev@dpdk.org > Cc: thomas@monjalon.net; Jerin Jacob Kollanukkaran ; > gage.eads@intel.com; hemant.agrawal@nxp.com; > Honnappa.Nagarahalli@arm.com; gavin.hu@arm.com; nd@arm.com > Subject: [EXT] [PATCH v6 1/3] eal/arm64: add 128-bit atomic compare > exchange >=20 > Add 128-bit atomic compare exchange on aarch64. >=20 > Suggested-by: Jerin Jacob > Signed-off-by: Phil Yang > Tested-by: Honnappa Nagarahalli > Reviewed-by: Honnappa Nagarahalli >=20 > --- > diff --git a/config/common_base b/config/common_base index > 8ef75c2..de6d1e0 100644 > --- a/config/common_base > +++ b/config/common_base > @@ -82,6 +82,8 @@ CONFIG_RTE_MAX_LCORE=3D128 > CONFIG_RTE_MAX_NUMA_NODES=3D8 > CONFIG_RTE_MAX_HEAPS=3D32 > CONFIG_RTE_MAX_MEMSEG_LISTS=3D64 Add new line here.=20 > +# Use LSE ATOMIC instructions I think, you can change the comment to "Use ARM LSE ATOMIC instructions" > +CONFIG_RTE_ARM_FEATURE_ATOMICS=3Dn This patches series has following check patch warning. Please fix it With above fixes you can add my acked-by in 1/3 and 3/3 patches in next rev= ision. I think, you can ignore following warning. WARNING:MACRO_WITH_FLOW_CONTROL: Macros with flow control statements should= be avoided [master]dell[dpdk.org] $ ./devtools/checkpatches.sh ### eal/arm64: add 128-bit atomic compare exchange WARNING:LONG_LINE: line over 80 characters #103: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:60: + rte_int128_t updated) = \ WARNING:LONG_LINE: line over 80 characters #108: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:65: + */ = \ WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations #108: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:65: + */ = \ WARNING:LONG_LINE: line over 80 characters #109: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:66: + register uint64_t x0 __asm("x0") =3D (uint64_t)old.val[0]; = \ WARNING:LONG_LINE: line over 80 characters #110: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:67: + register uint64_t x1 __asm("x1") =3D (uint64_t)old.val[1]; = \ WARNING:LONG_LINE: line over 80 characters #111: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:68: + register uint64_t x2 __asm("x2") =3D (uint64_t)updated.val[0]; = \ WARNING:LONG_LINE: line over 80 characters #112: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:69: + register uint64_t x3 __asm("x3") =3D (uint64_t)updated.val[1]; = \ WARNING:LONG_LINE: line over 80 characters #113: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:70: + asm volatile( = \ WARNING:LONG_LINE: line over 80 characters #115: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:72: + : [old0] "+r" (x0), = \ WARNING:LONG_LINE: line over 80 characters #116: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:73: + [old1] "+r" (x1) = \ WARNING:LONG_LINE: line over 80 characters #118: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:75: = = = =20 + [upd1] "r" (x3), = \ WARNING:LONG_LINE: line over 80 characters #119: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:76: + [dst] "r" (dst) = \ WARNING:LONG_LINE: line over 80 characters #120: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:77: + : "memory"); = \ WARNING:LONG_LINE: line over 80 characters #121: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:78: + old.val[0] =3D x0; = \ WARNING:LONG_LINE: line over 80 characters #122: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:79: + old.val[1] =3D x1; = \ WARNING:LONG_LINE: line over 80 characters #123: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:80: + return old; = \ WARNING:LONG_LINE: line over 80 characters #135: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:92: + rte_int128_t ret; = \ WARNING:LONG_LINE: line over 80 characters #136: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:93: + asm volatile( = \ WARNING:LONG_LINE: line over 80 characters #138: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:95: + : "=3D&r" (ret.val[0]), = \ WARNING:LONG_LINE: line over 80 characters #139: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:96: + "=3D&r" (ret.val[1]) = \ WARNING:LONG_LINE: line over 80 characters #140: FILE: lib/librte_eal/common/include/arch/arm/rte_atomic_64.h:97: + : "Q" (src->val[0]) = \ WARNING:LONG_LINE: line over 80 characters