From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f177.google.com (mail-pf0-f177.google.com [209.85.192.177]) by dpdk.org (Postfix) with ESMTP id 1E36211A2 for ; Wed, 16 Dec 2015 15:39:41 +0100 (CET) Received: by mail-pf0-f177.google.com with SMTP id o64so13073328pfb.3 for ; Wed, 16 Dec 2015 06:39:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mvista-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=Mu2SjUhmGj/r8Vb9Yt/wKYN6lJaTXGT/dPGFwZylQ4g=; b=iy7Ar/fiBfxBXaej5d4y79G16KRG9l0pGd96Nm/aFnJ7vgSLCVTcmenV7qRoxSm1TQ 83ynPS1ZhqBBMYRWD29AaxdOXzz0bKjlOrlqBXxJAKMnJcRouLgikHljEhVU5fvIlCS8 ILP0uY93YHLgijmYUiEwuBfyNzDsq72KhsdnFq+pmId1hyEyPpL/D5FK5co/WGP4x8VN OI53rFnlGfeICrhsM6c/gjvqu+iwEnNKmb0eVkR4s81Sa1KbpKyNOIkRYHAncGg7hnjQ r8z6ROQvWlNudSedcbr6EVu6IqHJnYT2LZMk7fxZ6kf6sL9ZEkk4l63nqyZiuLW9koGr r4og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=Mu2SjUhmGj/r8Vb9Yt/wKYN6lJaTXGT/dPGFwZylQ4g=; b=L5HaVXGLRRKSN6Hsy+OmBbLiIzZMi3FuJExo1XoKwvKu44PfpeV2KrXRY6PJ1l1MB7 yYfqR0vgYV2N7uWWNizqkfrFyk4nKMQzL1OPBSTxriY+YRN4sVIzLtjS8AaP6LmkeIf4 mONcXZHAMmfk066VtzwkCMmujTjOu1k+EtRCGyWbeu5QYYLYGSbVdaM0OVR7RcmA7Wz8 J2Pf0BQ508tUtOrLIAW725VtB9dtXeplp9guS1a59o6p613+p/A+gdG7d6yio5RSbIb2 sFV/0nstREK1NLZ/yrOIW3s2vIqgCZkCkSXedoNBUNEGkfdj+l0fIN46FWBJEH1uqIjJ H6MQ== X-Gm-Message-State: ALoCoQmRcP3h0uPJIwoh2XsFWfuSI7seoX9kRb4gbgteZOSKWFfIzOpOx+IoCeQY1DwezGLwHNFFnPZztGOcIyt8qXDuc1HfEfhOkv9cJsKX9XZRV/YoeU4= MIME-Version: 1.0 X-Received: by 10.98.14.134 with SMTP id 6mr5881922pfo.155.1450276780515; Wed, 16 Dec 2015 06:39:40 -0800 (PST) Received: by 10.66.13.233 with HTTP; Wed, 16 Dec 2015 06:39:40 -0800 (PST) In-Reply-To: <20151216142326.GV29571@yliu-dev.sh.intel.com> References: <1450098032-21198-1-git-send-email-sshukla@mvista.com> <1450098032-21198-6-git-send-email-sshukla@mvista.com> <20151216134850.GU29571@yliu-dev.sh.intel.com> <20151216142326.GV29571@yliu-dev.sh.intel.com> Date: Wed, 16 Dec 2015 20:09:40 +0530 Message-ID: From: Santosh Shukla To: Yuanhan Liu Content-Type: text/plain; charset=UTF-8 Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [ [PATCH v2] 05/13] virtio: change io_base datatype from uint32_t to uint64_type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Dec 2015 14:39:41 -0000 On Wed, Dec 16, 2015 at 7:53 PM, Yuanhan Liu wrote: > On Wed, Dec 16, 2015 at 07:31:57PM +0530, Santosh Shukla wrote: >> On Wed, Dec 16, 2015 at 7:18 PM, Yuanhan Liu >> wrote: >> > On Mon, Dec 14, 2015 at 06:30:24PM +0530, Santosh Shukla wrote: >> >> In x86 case io_base to store ioport address not more than 65535 ioports. i.e..0 >> >> to ffff but in non-x86 case in particular arm64 it need to store more than 32 >> >> bit address so changing io_base datatype from 32 to 64. >> >> >> >> Signed-off-by: Santosh Shukla >> >> --- >> >> drivers/net/virtio/virtio_ethdev.c | 2 +- >> >> drivers/net/virtio/virtio_pci.h | 4 ++-- >> >> 2 files changed, 3 insertions(+), 3 deletions(-) >> >> >> >> diff --git a/drivers/net/virtio/virtio_ethdev.c b/drivers/net/virtio/virtio_ethdev.c >> >> index d928339..620e0d4 100644 >> >> --- a/drivers/net/virtio/virtio_ethdev.c >> >> +++ b/drivers/net/virtio/virtio_ethdev.c >> >> @@ -1291,7 +1291,7 @@ eth_virtio_dev_init(struct rte_eth_dev *eth_dev) >> >> return -1; >> >> >> >> hw->use_msix = virtio_has_msix(&pci_dev->addr); >> >> - hw->io_base = (uint32_t)(uintptr_t)pci_dev->mem_resource[0].addr; >> >> + hw->io_base = (uint64_t)(uintptr_t)pci_dev->mem_resource[0].addr; >> > >> > I'd suggest to move the io_base assignment (and cast) into virtio_ioport_init() >> > so that we could do the correct cast there, say cast it to uint32_t for >> > X86, and uint64_t for others. >> > >> >> Ok. >> >> This was deliberately done considering your 1.0 virtio spec patch do >> care for uint64_t types and in arm64 case, If I plan to use those >> future patches, IMO it make more sense to me keep it in uint64_t way; > > I did different cast, 32 bit for legacy virtio pci device, and 64 bit > for modern virtio pci device. > >> Also in x86 case max address could of type 0x1000-101f and so forth; >> changing data-type to uint64_t default wont effect such address, >> right? > > Right, but what's the harm of doing the right cast? :) > Agree. >> And hw->io_base by looking at virtio_pci.h function like >> inb/outb etc.. takes io_base address as unsigned long types which is >> arch dependent; i.e.. 4 byte for 32 bit and 8 for 64 bit so the lower >> level rd/wr apis are taking care of data-types accordingly. > > Didn't get it. inb/outb takes "unsigned short" arguments, but not > "unsigned long". > sys/io.h in x86 case using unsigned short int types.. include/asm-generic/io.h for arm64 using it unsigned long (from linux header files) In such case keeping #define VIRTIO_PCI_REG_ADDR(hw, reg) \ (unsigned short)((hw)->io_base + (reg)) would be x86 specific and what I thought and used in this patch is #define VIRTIO_PCI_REG_ADDR(hw, reg) \ (unsigned long)((hw)->io_base + (reg)) to avoid ifdef ARM or non-x86..clutter, I know data-type is not right fit for x86 sys/io.h but considering possible address inside hw->io_base, wont effect functionality and performance my any mean. That is why at virtio_ethdev_init() i choose to keep it in hw->io_base = (uint64_t) types. Otherwise I'll have to duplicate VIRTIO_PCI_REG_XXX definition for non-x86 case, Pl. suggest better alternative. Thanks > --yliu