From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6C4D642DD1; Tue, 4 Jul 2023 12:46:08 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3DF4940E03; Tue, 4 Jul 2023 12:46:08 +0200 (CEST) Received: from mail-ed1-f53.google.com (mail-ed1-f53.google.com [209.85.208.53]) by mails.dpdk.org (Postfix) with ESMTP id 3B0B840042 for ; Tue, 4 Jul 2023 12:46:07 +0200 (CEST) Received: by mail-ed1-f53.google.com with SMTP id 4fb4d7f45d1cf-51a52a7d859so9648046a12.0 for ; Tue, 04 Jul 2023 03:46:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=netgate.com; s=google; t=1688467567; x=1691059567; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=7Tx04CN/0fNYAzpkrplGZornMwgYCPL32UIax6tliUA=; b=OA2y04gz3QQ7AlyppuPeWnH9ShB9i5q+tWKXlthpE4ZHJ2OovcYmIj7LbEUOMNbqE0 i7L3SoFUYb/cbDjkGguy1u48/PR4q7pcolckLodS5YHz3sTPSsmJGX2MkBDeeMnsMpCV 4Mvq2mJj6sDEqDisRXEif0+XWww+eS3ITEnaI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688467567; x=1691059567; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=7Tx04CN/0fNYAzpkrplGZornMwgYCPL32UIax6tliUA=; b=kt8wo310YgZaRzDLZFie36T+zLokNcFyihLGKpNfVrVO3MUKqNjOs28dsBovtoJiXq gjOPy8LhPKAs9JVexFS1cdoAs9l2AgocO3fRkCWUsIaiP8Y0n8MRKQ9Jt+zP53uxwG1E WaI3KWA5mXKPucw+MpkONAwcYnnuLjPJudagkz4h9YkdpXPqvMYx+nLpzqfuixOOsd8/ SLzrHQHOO1/hnftdsa1nXbat1GQFfGo75EY8XQTU0KBmPrgZQucyPsKa0PHZiFBWHQyV OvuAHTbdQHtjzeTtaHVTVIW2+dy1qSgM4BWcwPMalgUqHbMiKDhuEjwrmWlfXJ2vx9LY USFg== X-Gm-Message-State: ABy/qLZOyQEktao8nmc43JCm7ulD5b476lO8ZaaXxNwR6z24oHn2Qwyt btwpq73DH24b/GwhyjLqGouMAtoeg0Ux/vqhjjKMIQ== X-Google-Smtp-Source: APBJJlHJv2g+qWhPku37dxVKbTe3vu9ktlZL6AJOfz4cN1Oa2VsYAfOOOMEpIa+dagd3ltm7KZkN7M1B4O9CDgtoMaw= X-Received: by 2002:aa7:cf1a:0:b0:51e:1c5c:b97f with SMTP id a26-20020aa7cf1a000000b0051e1c5cb97fmr1826746edy.2.1688467566770; Tue, 04 Jul 2023 03:46:06 -0700 (PDT) MIME-Version: 1.0 References: <20230614134018.2344-1-vratnikov@netgate.com> <20230614094638.2649366f@hermes.local> <8278146.NyiUUSuA9g@thomas> In-Reply-To: <8278146.NyiUUSuA9g@thomas> From: Vladimir Ratnikov Date: Tue, 4 Jul 2023 12:45:54 +0200 Message-ID: Subject: Re: [PATCH] eal/interrupts: Allow UIO interrupts when using igb_uio To: Stephen Hemminger Cc: hkalra@marvell.com, dev@dpdk.org, Junfeng Guo , Simei Su , qi.z.zhang@intel.com, Thomas Monjalon Content-Type: multipart/alternative; boundary="000000000000884d6b05ffa6fdf3" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org --000000000000884d6b05ffa6fdf3 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sorry for a long reply, sure. Stephen, am I right that the most concern is about a place where interrupt capabilities check appears for non MSI-X support? What if having dedicated rte_intr_cap_single analog when there's no support for MSI-X and just do the same(check capability, allocate interrupt vector etc) ? Regards, -Vladimir On Mon, Jul 3, 2023 at 5:32=E2=80=AFPM Thomas Monjalon wrote: > 14/06/2023 18:46, Stephen Hemminger: > > On Wed, 14 Jun 2023 13:40:18 +0000 > > Vladimir Ratnikov wrote: > > > > > Some drivers and devices(ex: igc + i225/i226) use > > > RTE_INTR_HANDLE_UIO handler when captured under igb_uio > > > so just let them use it. > > > > > > Signed-off-by: Vladimir Ratnikov > > > > This doesn't look right. > > > > With UIO only a single interrupt is possible, there is no MSI-X support= . > > Please Vladimir, could you reply to Stephen? > I think he is suggesting a better fix in the igc driver. > > > --000000000000884d6b05ffa6fdf3 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Sorry for a long reply, sure.
Stephen,
am I right that the most concern is about a place where = interrupt capabilities check appears for non MSI-X support?
What if havi= ng dedicated=C2=A0rte_intr_cap_single analog when there's= no support for MSI-X and just do the same(check capability, allocate inter= rupt vector etc) ?


Regards,
-Vladimir


On Mon, Jul 3, 2023= at 5:32=E2=80=AFPM Thomas Monjalon <thomas@monjalon.net> wrote:
14/06/2023 18:46, Stephen Hemminger:
> On Wed, 14 Jun 2023 13:40:18 +0000
> Vladimir Ratnikov <vratnikov@netgate.com> wrote:
>
> >=C2=A0 Some drivers and devices(ex: igc + i225/i226) use
> > RTE_INTR_HANDLE_UIO handler when captured under igb_uio
> > so just let them use it.
> >
> > Signed-off-by: Vladimir Ratnikov <vratnikov@netgate.com>
>
> This doesn't look right.
>
> With UIO only a single interrupt is possible, there is no MSI-X suppor= t.

Please Vladimir, could you reply to Stephen?
I think he is suggesting a better fix in the igc driver.


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