From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 98473A0C41; Fri, 29 Oct 2021 20:02:23 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2890640688; Fri, 29 Oct 2021 20:02:23 +0200 (CEST) Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) by mails.dpdk.org (Postfix) with ESMTP id 54CD040395 for ; Fri, 29 Oct 2021 20:02:21 +0200 (CEST) Received: by mail-lf1-f54.google.com with SMTP id j2so22600125lfg.3 for ; Fri, 29 Oct 2021 11:02:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Kw/k/CDhyCJ6/xuxNw+xhL/wJ5gukVAXS01PenphCiI=; b=bNHE/1AgXO557RuWauzTzjGjYAP1n7o33dnIeg7L9MVjKT+DTxasHHqRifFOCVTTjV HVByvRuZxxRUr+JrVqebuliqyXfFSidIVnfT8op/WCr1X9DaqZDTt/+pc+BBZ2ZAUNHO P4DYmyyK4zrDyRuiSL05NPNCqtoMUcBD+MKCDtC/0U1swuicnIFaPUvomGyN5v6CC5cH ubvoNEW7/cjDex1bwE/LTR4hxUSgYSeEctCEI0kSSLnUhCvkoGsXKvt1pDm863TNTjDm olXwFcNlQTW8NFtB+YnNrNdXvaOUgMeOgladS+pl1Rh3GyafLS2ZCVjWVNMsxwXqHfuU tkiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Kw/k/CDhyCJ6/xuxNw+xhL/wJ5gukVAXS01PenphCiI=; b=SarLp/SMtrmBrwzMcQi8Iw/Vt0Nw9LEFNQoxRfsO5qnyujZF1AnD51Y1wWwWh9DtFh cSlS1fjDk9XnxBAJiZzTVXi0cqeW/rXrQQ6xfztgMwZKM2k78jG49dO56+zjf685Zaoq Y50oOD6kMjOG+cdkgtN3LWxSNh5HpCC094NAnKOuI/Y5WBr3XZPl5ayuEitLB9RIHTJL +6jLC7ceQ1tcQKTLoBmFWlyZPI0P8h+TdxKkJwlitLYLVYC5WAFS0kCRK9kk+DC5FsoB hZpd61VNh9LQZDYe+C70Yai0WyB7CrObvm6x5fmijNg6MMhuQTDvRiI4KCmmL8Jknyq1 c7cA== X-Gm-Message-State: AOAM530WoapyuO0ZrJZ6oaUH9TrTxj2Tra6yBzR/WIGKoB/zQo3DdpCS huFuDk8EYndhdEOjlvA9FiWpS8Hw3QCYYtNr/1w= X-Google-Smtp-Source: ABdhPJxbl4+0qrBttRY5vvNiL5aUOnBX1GunIVfOErRfWkfQhdEjJvEBOQKiyAV7Zo4STtniiylSNVOVrA0MofmJoQs= X-Received: by 2002:ac2:5227:: with SMTP id i7mr11672063lfl.472.1635530540742; Fri, 29 Oct 2021 11:02:20 -0700 (PDT) MIME-Version: 1.0 References: <20211026041300.28924-1-radhac@marvell.com> <20211026041300.28924-3-radhac@marvell.com> In-Reply-To: From: Radha Mohan Date: Fri, 29 Oct 2021 11:02:09 -0700 Message-ID: To: Jerin Jacob Cc: Radha Mohan Chintakuntla , Thomas Monjalon , fengchengwen , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Koteswara Rao Kottidi , Jerin Jacob , Satananda Burla , dpdk-dev Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH 3/4] dma/cnxk: add dma channel operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Oct 29, 2021 at 7:54 AM Jerin Jacob wrote: > > On Thu, Oct 28, 2021 at 11:48 PM Radha Mohan wrote: > > > > On Tue, Oct 26, 2021 at 1:49 AM Jerin Jacob wrote: > > > > > > On Tue, Oct 26, 2021 at 9:43 AM Radha Mohan Chintakuntla > > > wrote: > > > > > > > > Add functions for the dmadev vchan setup and DMA operations. > > > > > > > > Signed-off-by: Radha Mohan Chintakuntla > > > > > +static int > > > > +cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, > > > > + rte_iova_t dst, uint32_t length, uint64_t flags) > > > > +{ > > > > + uint64_t cmd[DPI_MAX_CMD_SIZE] = {0}; > > > > + union dpi_instr_hdr_s *header = (union dpi_instr_hdr_s *)&cmd[0]; > > > > + rte_iova_t fptr, lptr; > > > > + struct cnxk_dpi_vf_s *dpivf = dev_private; > > > > + struct cnxk_dpi_compl_s *comp_ptr; > > > > + int num_words = 0; > > > > + int rc; > > > > + > > > > + RTE_SET_USED(vchan); > > > > + > > > > + header->s.xtype = dpivf->conf.direction; > > > > + header->s.pt = DPI_HDR_PT_ZBW_CA; > > > > + comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; > > > > + comp_ptr->cdata = DPI_REQ_CDATA; > > > > + header->s.ptr = (uint64_t)comp_ptr; > > > > + STRM_INC(dpivf->conf.c_desc); > > > > + > > > > + /* pvfe should be set for inbound and outbound only */ > > > > + if (header->s.xtype <= 1) > > > > + header->s.pvfe = 1; > > > > + num_words += 4; > > > > + > > > > + header->s.nfst = 1; > > > > + header->s.nlst = 1; > > > > > > Including filling zeros in cmd and the rest of the filling can be > > > moved to slow path.. > > > > > > Please change the logic to populate the static items based on > > > configure/channel setup > > > in slowpath and update only per transfer-specific items to have better > > > performance. > > > > > These are instruction header values that we are filling. If you look > > at it there is really one 64bit field that can be filled beforehand > > a.k.a slowpath in vchan_setup(). > > Rest of the header can only be filled here like nlst, nfst (these are > > number of pointers to be DMA'ed) and completion pointer. So just for > > that I do not see a value in moving around the code. > > Two things, > > 1) By dong like below, > > > > + header->s.nfst = 1; > > > > + header->s.nlst = 1; > > it will generate multiple stores. No it won't for this case. Here is how the compiler generated the writes to the 64-bit fields of the header field. 7a4: d2e00821 mov x1, #0x41000000000000 // #18295873486192640 >One option is to have a local u64 > variable and form the required descriptor and write it one shot. > It is a standard optimation strategy used in fastpath. Maybe not here. > > 2) uint64_t cmd[DPI_MAX_CMD_SIZE] = {0}; This will result in memset of > 64B, That reason for creating > template based on vchan make sense. > > Looks like moving to a template-based scheme need a lot of rework in > the driver, > I will leave you to decide performance vs other aspects as you are > maintaining the driver. > No strong opinion. > Ok understand. We'll do a v2 with some improvments. > > > > >