From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 18B05A0471 for ; Sat, 20 Jul 2019 04:59:17 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B65DA5B3C; Sat, 20 Jul 2019 04:59:16 +0200 (CEST) Received: from mail-io1-f50.google.com (mail-io1-f50.google.com [209.85.166.50]) by dpdk.org (Postfix) with ESMTP id B51C7137C for ; Sat, 20 Jul 2019 04:59:14 +0200 (CEST) Received: by mail-io1-f50.google.com with SMTP id q22so62465047iog.4 for ; Fri, 19 Jul 2019 19:59:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=9LAbvH2DGi45YSu/H8+D9J0F4kdPtCau+dIDkpBDWZM=; b=E4tF6goPtrnbBp/ExQdTyjjLzyDGQdh2TAsdOSDqRa3ndQXk5v2LlBFwPz0BjhRbnk ULXv1NY0+dFB258nR8shAJPLGvUTcZrbiSPzRhdkrDGRYXoHvOCVU0NUJWrGRbupjTBJ w8gXNku+redsVeVKL2/b37dCM5sGW/NkDRgAWw9RdX9SYRodk9E9zMED63FPEgHuCg0O AUokkFtzjK4jiYbPgdHK3sfV+VbhN/afenlArZqbsORiAKYwBzpYyItDfJ1DFiJWsl7o Vepr9pX1MMLQIWNtAfxJB+G7/yZiqC+G1ph7MuNNJ+vveptfO01P4YJhB1tU4ZhutoTS iO4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=9LAbvH2DGi45YSu/H8+D9J0F4kdPtCau+dIDkpBDWZM=; b=WgGH+1QfclaFJy6UGnudlOFZ2j0S8qYR22sLlXPZ/+COBBw4cSwQ7QXqoWlw2lIT5v OnGFvkzpxVQejoETujHxW8zsxyE06TIaPWV5MzL40MjQ2Vwn+bx4XZ7lo3P9tcaRM1WZ Dnxd77ui1hATLLRHZjVM3Rua1vwFlEaR5Hd0lyuctI5nB9s15nnYNMtSObE4getjLDKq i0DYuiqRrs74uUCrIli2RWHN89LWhJuJTvl9vB/Ui3EvFqCc+/44nxWLL9DNNHHvLigY aELg3hcSsmnlSrnTU18DJh7AwP7CNWCofVouvvnDhM9gY22mbaxbdVaiGjxQik87LI3q 1/JA== X-Gm-Message-State: APjAAAXvyxb6X0AyAC0mOuqkt4jiadWOjdtKOpuP9WqKpA/SRUVLJE8k RClQTcScLVOebSE78hpePgFVpRzI5pUKRaezhjgnUg== X-Google-Smtp-Source: APXvYqzkhW5HDReOZ1evyx6hsnUydeJrGrr067Httg2jzHjvamZzXJYVOC5vwn8rZ0v7v6lGvQplC7/awQTXNlrUFt8= X-Received: by 2002:a5e:d507:: with SMTP id e7mr45864101iom.284.1563591554012; Fri, 19 Jul 2019 19:59:14 -0700 (PDT) MIME-Version: 1.0 References: <1562593002-36586-1-git-send-email-xiao.zhang@intel.com> In-Reply-To: <1562593002-36586-1-git-send-email-xiao.zhang@intel.com> From: "Anand H. Krishnan" Date: Sat, 20 Jul 2019 08:26:53 +0530 Message-ID: To: Xiao Zhang Cc: dev@dpdk.org, "Lu, Wenzhuo" , "Zhao1, Wei" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [dpdk-dev] [DPDK] net/e1000: fix buffer overrun while i219 processing DMA transactions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This seems to be changing the IGB driver. Shouldn't you be changing the em driver rather than the igb driver? Thanks, Anand On Mon, Jul 8, 2019 at 10:10 AM Xiao Zhang wrote: > > Intel=C2=AE 100/200 Series Chipset platforms reduced the round-trip > latency for the LAN Controller DMA accesses, causing in some high > performance cases a buffer overrun while the I219 LAN Connected > Device is processing the DMA transactions. I219LM and I219V devices > can fall into unrecovered Tx hang under very stressfully UDP traffic > and multiple reconnection of Ethernet cable. This Tx hang of the LAN > Controller is only recovered if the system is rebooted. Slightly slow > down DMA access by reducing the number of outstanding requests. > This workaround could have an impact on TCP traffic performance > on the platform. Disabling TSO eliminates performance loss for TCP > traffic without a noticeable impact on CPU performance. > > Please, refer to I218/I219 specification update: > https://www.intel.com/content/www/us/en/embedded/products/networking/ > ethernet-connection-i218-family-documentation.html > > Signed-off-by: Xiao Zhang > --- > drivers/net/e1000/base/e1000_ich8lan.h | 1 + > drivers/net/e1000/igb_rxtx.c | 16 ++++++++++++++++ > 2 files changed, 17 insertions(+) > > diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/b= ase/e1000_ich8lan.h > index 1f2a3f8..084eb9c 100644 > --- a/drivers/net/e1000/base/e1000_ich8lan.h > +++ b/drivers/net/e1000/base/e1000_ich8lan.h > @@ -134,6 +134,7 @@ POSSIBILITY OF SUCH DAMAGE. > #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs*/ > #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */ > #define E1000_TARC0_CB_MULTIQ_3_REQ (1 << 28 | 1 << 29) > +#define E1000_TARC0_CB_MULTIQ_2_REQ (1 << 29) > #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL > > #define E1000_ICH_RAR_ENTRIES 7 > diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c > index 33eeb4e..5d45e62 100644 > --- a/drivers/net/e1000/igb_rxtx.c > +++ b/drivers/net/e1000/igb_rxtx.c > @@ -2627,6 +2627,22 @@ eth_igb_tx_init(struct rte_eth_dev *dev) > > e1000_config_collision_dist(hw); > > + /* SPT and CNP Si errata workaround to avoid data corruption */ > + if (hw->mac.type =3D=3D e1000_pch_spt) { > + uint32_t reg_val; > + reg_val =3D E1000_READ_REG(hw, E1000_IOSFPC); > + reg_val |=3D E1000_RCTL_RDMTS_HEX; > + E1000_WRITE_REG(hw, E1000_IOSFPC, reg_val); > + > + /* Dropping the number of outstanding requests from > + * 3 to 2 in order to avoid a buffer overrun. > + */ > + reg_val =3D E1000_READ_REG(hw, E1000_TARC(0)); > + reg_val &=3D ~E1000_TARC0_CB_MULTIQ_3_REQ; > + reg_val |=3D E1000_TARC0_CB_MULTIQ_2_REQ; > + E1000_WRITE_REG(hw, E1000_TARC(0), reg_val); > + } > + > /* This write will effectively turn on the transmit unit. */ > E1000_WRITE_REG(hw, E1000_TCTL, tctl); > } > -- > 2.7.4 >