From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6F567A04BC; Thu, 8 Oct 2020 15:42:34 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D04EF1C10D; Thu, 8 Oct 2020 15:42:32 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by dpdk.org (Postfix) with ESMTP id 6296C1C10B for ; Thu, 8 Oct 2020 15:42:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1602164548; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=/GS2Ois9KCMCtrUXjtUc2vOD5pYPLB2n45TMkkB5vZQ=; b=ZuEBaBAbHLniy5cZjuUa4K0jDUc7C4wZJXmnwtGAiRCIAk/GzuAk75q10CSi3ds8HhsHFi KVsSpeC5Q51QkqWdWOED6lo+muMLx8FB2HYc66qDfYdwxUqZyCe2YUZKHdpeJoOfTzp3kG w7fLP2K/aPdgdNhdqz3j5cW5tg7Yx3U= Received: from mail-vs1-f71.google.com (mail-vs1-f71.google.com [209.85.217.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-400-zo0DFTW6PxOPX64ipIw96g-1; Thu, 08 Oct 2020 09:42:26 -0400 X-MC-Unique: zo0DFTW6PxOPX64ipIw96g-1 Received: by mail-vs1-f71.google.com with SMTP id 125so722630vst.23 for ; Thu, 08 Oct 2020 06:42:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/GS2Ois9KCMCtrUXjtUc2vOD5pYPLB2n45TMkkB5vZQ=; b=Y2nxTN9CAphWOT1dmNUkR3Cu4eS1E5FGYYP6L8U+OcdRVCxDgLQWMM32d26FKwKiDb D9GviMHEc164nM/MmCDNoyhaZ28uhbPpojLoYzdKPC1uSsmyA56+zUPKpo2mZou8XG5s b4L8lBh1m0fFNkHEaE9S9Up8x65AF3dXNIfLW3OoLfYB0gsDNSdJ+qyS5dJdg+80I11t SxnWzv4JJux9H8Bpjm4E9fvXEeH/e9hOulfps1T+UhqF8Y8AHu2oKiu3IU6t3E0u+MBE +qb993lry18W8n1TMEbqNeJYkRPhTeBRgZ4FW96pID4i/BJ+pEBRKBn9fAux3Q8Rc5qp 5yPg== X-Gm-Message-State: AOAM5318d/myKHuJKcxOP1AcKa/Onz2+lE/V4x2KMoMYISrtpqbgJJ1i L4J0UT6AarqrF2Cl3Drvle8Z1TwY15XnVYkPPP4b6UiqwY0HeR8GdpHTsIRHtfrCZfpxBi4Bir/ DzYtQl0dffMXZ/RuX3E0= X-Received: by 2002:a1f:e905:: with SMTP id g5mr4636957vkh.17.1602164544557; Thu, 08 Oct 2020 06:42:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzUw6IxCOiXLWAYBwriaFK0AaYpCx6IBy0PdK/0OCgkiF2U9/VhovqluL2jVcdxX5yXVB1K0rgxEoWvBvBlIJc= X-Received: by 2002:a1f:e905:: with SMTP id g5mr4636932vkh.17.1602164544221; Thu, 08 Oct 2020 06:42:24 -0700 (PDT) MIME-Version: 1.0 References: <20201005184526.7465-1-konstantin.ananyev@intel.com> <20201006150316.5776-1-konstantin.ananyev@intel.com> <20201006150316.5776-2-konstantin.ananyev@intel.com> In-Reply-To: <20201006150316.5776-2-konstantin.ananyev@intel.com> From: David Marchand Date: Thu, 8 Oct 2020 15:42:12 +0200 Message-ID: To: Konstantin Ananyev Cc: dev , Jerin Jacob Kollanukkaran , "Ruifeng Wang (Arm Technology China)" , Vladimir Medvedkin , dpdk stable Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=dmarchan@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v4 01/14] acl: fix x86 build when compiler doesn't support AVX2 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Oct 6, 2020 at 5:08 PM Konstantin Ananyev wrote: > > Right now we define dummy version of rte_acl_classify_avx2() > when both X86 and AVX2 are not detected, though it should be > for non-AVX2 case only. > > Fixes: e53ce4e41379 ("acl: remove use of weak functions") > Cc: stable@dpdk.org > > Signed-off-by: Konstantin Ananyev > --- > lib/librte_acl/rte_acl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c > index 777ec4d340..715b023592 100644 > --- a/lib/librte_acl/rte_acl.c > +++ b/lib/librte_acl/rte_acl.c > @@ -16,7 +16,6 @@ static struct rte_tailq_elem rte_acl_tailq = { > }; > EAL_REGISTER_TAILQ(rte_acl_tailq) > > -#ifndef RTE_ARCH_X86 > #ifndef CC_AVX2_SUPPORT > /* > * If the compiler doesn't support AVX2 instructions, > @@ -33,6 +32,7 @@ rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx, > } > #endif > > +#ifndef RTE_ARCH_X86 > int > rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx, > __rte_unused const uint8_t **data, > -- > 2.17.1 > Reviewed-by: David Marchand -- David Marchand