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Mon, 02 Dec 2024 04:59:48 -0800 (PST) X-Google-Smtp-Source: AGHT+IFwikGh74UFxOALeXZrfq8qd5+xbZcG3YfSUTdrfPdeHcizC4HjOu8rItlXBXxLjsNrkaw9qxqzjaG6JwvS7MI= X-Received: by 2002:a05:651c:1506:b0:2ff:e45e:7a2c with SMTP id 38308e7fff4ca-2ffe45e7c79mr50069341fa.0.1733144388335; Mon, 02 Dec 2024 04:59:48 -0800 (PST) MIME-Version: 1.0 References: <20241122125418.2857301-1-bruce.richardson@intel.com> <20241202112444.1517416-1-bruce.richardson@intel.com> <20241202112444.1517416-12-bruce.richardson@intel.com> In-Reply-To: <20241202112444.1517416-12-bruce.richardson@intel.com> From: David Marchand Date: Mon, 2 Dec 2024 13:59:37 +0100 Message-ID: Subject: Re: [PATCH v1 11/21] net/_common_intel: add post-Tx buffer free function To: Bruce Richardson Cc: dev@dpdk.org, Ian Stokes , Vladimir Medvedkin , Anatoly Burakov X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: TYWu1n-3Ru6Ym9oUMWWqWonIZP-8I2QL7nqP5ygiStQ_1733144389 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Mon, Dec 2, 2024 at 12:27=E2=80=AFPM Bruce Richardson wrote: > > The actions taken for post-Tx buffer free for the SSE and AVX drivers > for i40e, iavf and ice drivers are all common, so centralize those in > common/intel_eth driver. > > Signed-off-by: Bruce Richardson > --- > drivers/net/_common_intel/tx.h | 71 ++++++++++++++++++++++++ > drivers/net/i40e/i40e_rxtx_vec_common.h | 72 ++++--------------------- > drivers/net/iavf/iavf_rxtx_vec_common.h | 61 ++++----------------- > drivers/net/ice/ice_rxtx_vec_common.h | 61 ++++----------------- > 4 files changed, 98 insertions(+), 167 deletions(-) > > diff --git a/drivers/net/_common_intel/tx.h b/drivers/net/_common_intel/t= x.h > index c372d2838b..a930309c05 100644 > --- a/drivers/net/_common_intel/tx.h > +++ b/drivers/net/_common_intel/tx.h > @@ -7,6 +7,7 @@ > > #include > #include > +#include > > /* forward declaration of the common intel (ci) queue structure */ > struct ci_tx_queue; > @@ -107,4 +108,74 @@ ci_tx_backlog_entry(struct ci_tx_entry *txep, struct= rte_mbuf **tx_pkts, uint16_ > txep[i].mbuf =3D tx_pkts[i]; > } > > +#define IETH_VPMD_TX_MAX_FREE_BUF 64 > + > +typedef int (*ci_desc_done_fn)(struct ci_tx_queue *txq, uint16_t idx); > + > +static __rte_always_inline int > +ci_tx_free_bufs(struct ci_tx_queue *txq, ci_desc_done_fn desc_done) > +{ > + struct ci_tx_entry *txep; > + uint32_t n; > + uint32_t i; > + int nb_free =3D 0; > + struct rte_mbuf *m, *free[IETH_VPMD_TX_MAX_FREE_BUF]; > + > + /* check DD bits on threshold descriptor */ > + if (!desc_done(txq, txq->tx_next_dd)) > + return 0; > + > + n =3D txq->tx_rs_thresh; > + > + /* first buffer to free from S/W ring is at index > + * tx_next_dd - (tx_rs_thresh-1) > + */ > + txep =3D &txq->sw_ring[txq->tx_next_dd - (n - 1)]; > + > + if (txq->offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) { > + for (i =3D 0; i < n; i++) { > + free[i] =3D txep[i].mbuf; > + /* no need to reset txep[i].mbuf in vector path *= / > + } > + rte_mempool_put_bulk(free[0]->pool, (void **)free, n); > + goto done; > + } > + > + m =3D rte_pktmbuf_prefree_seg(txep[0].mbuf); > + if (likely(m !=3D NULL)) { > + free[0] =3D m; > + nb_free =3D 1; > + for (i =3D 1; i < n; i++) { > + m =3D rte_pktmbuf_prefree_seg(txep[i].mbuf); > + if (likely(m !=3D NULL)) { > + if (likely(m->pool =3D=3D free[0]->pool))= { > + free[nb_free++] =3D m; > + } else { > + rte_mempool_put_bulk(free[0]->poo= l, > + (void *)free= , > + nb_free); > + free[0] =3D m; > + nb_free =3D 1; > + } > + } > + } > + rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_fre= e); > + } else { > + for (i =3D 1; i < n; i++) { > + m =3D rte_pktmbuf_prefree_seg(txep[i].mbuf); > + if (m !=3D NULL) > + rte_mempool_put(m->pool, m); > + } > + } Is it possible to take an extra step and convert to rte_pktmbuf_free_bulk? > + > +done: > + /* buffers were freed, update counters */ > + txq->nb_tx_free =3D (uint16_t)(txq->nb_tx_free + txq->tx_rs_thres= h); > + txq->tx_next_dd =3D (uint16_t)(txq->tx_next_dd + txq->tx_rs_thres= h); > + if (txq->tx_next_dd >=3D txq->nb_tx_desc) > + txq->tx_next_dd =3D (uint16_t)(txq->tx_rs_thresh - 1); > + > + return txq->tx_rs_thresh; > +} > + --=20 David Marchand