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Thu, 17 Oct 2019 11:28:10 -0700 (PDT) MIME-Version: 1.0 References: <1561911676-37718-1-git-send-email-gavin.hu@arm.com> <1569562904-43950-1-git-send-email-gavin.hu@arm.com> <1569562904-43950-4-git-send-email-gavin.hu@arm.com> In-Reply-To: <1569562904-43950-4-git-send-email-gavin.hu@arm.com> From: David Marchand Date: Thu, 17 Oct 2019 20:27:59 +0200 Message-ID: To: Gavin Hu Cc: dev , nd , Thomas Monjalon , Stephen Hemminger , Hemant Agrawal , Jerin Jacob Kollanukkaran , Pavan Nikhilesh , Honnappa Nagarahalli , "Ruifeng Wang (Arm Technology China)" , Phil Yang , Steve Capper X-MC-Unique: Y212ppKxMAKmkqfv5shDHg-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [dpdk-dev] [PATCH v7 3/7] spinlock: use wfe to reduce contention on aarch64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Sep 27, 2019 at 7:43 AM Gavin Hu wrote: > > In acquiring a spinlock, cores repeatedly poll the lock variable. > This is replaced by rte_wait_until_equal API. > > Running the micro benchmarking and the testpmd and l3fwd traffic tests > on ThunderX2, Ampere eMAG80 and Arm N1SDP, everything went well and no > notable performance gain nor degradation was measured. > > Signed-off-by: Gavin Hu > Reviewed-by: Ruifeng Wang > Reviewed-by: Phil Yang > Reviewed-by: Steve Capper > Reviewed-by: Ola Liljedahl > Reviewed-by: Honnappa Nagarahalli > Tested-by: Pavan Nikhilesh > --- > .../common/include/arch/arm/rte_spinlock.h | 26 ++++++++++++++++= ++++++ > 1 file changed, 26 insertions(+) > > diff --git a/lib/librte_eal/common/include/arch/arm/rte_spinlock.h b/lib/= librte_eal/common/include/arch/arm/rte_spinlock.h > index 1a6916b..b61c055 100644 > --- a/lib/librte_eal/common/include/arch/arm/rte_spinlock.h > +++ b/lib/librte_eal/common/include/arch/arm/rte_spinlock.h > @@ -16,6 +16,32 @@ extern "C" { > #include > #include "generic/rte_spinlock.h" > > +/* armv7a does support WFE, but an explicit wake-up signal using SEV is > + * required (must be preceded by DSB to drain the store buffer) and > + * this is less performant, so keep armv7a implementation unchanged. > + */ > +#ifndef RTE_FORCE_INTRINSICS Earlier, in the same file, I can see: https://git.dpdk.org/dpdk/tree/lib/librte_eal/common/include/arch/arm/rte_s= pinlock.h?h=3Dv19.08#n8 #ifndef RTE_FORCE_INTRINSICS # error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS #endif IIUC, this is dead code. > +static inline void > +rte_spinlock_lock(rte_spinlock_t *sl) > +{ > + unsigned int tmp; > + /* http://infocenter.arm.com/help/index.jsp?topic=3D/com.arm.doc. > + * faqs/ka16809.html > + */ > + asm volatile( > + "1: ldaxr %w[tmp], %w[locked]\n" > + "cbnz %w[tmp], 2f\n" > + "stxr %w[tmp], %w[one], %w[locked]\n" > + "cbnz %w[tmp], 1b\n" > + "ret\n" > + "2: sevl\n" > + "wfe\n" > + "jmp 1b\n" > + : [tmp] "=3D&r" (tmp), [locked] "+Q"(sl->locked) > + : [one] "r" (1) > +} > +#endif > + > static inline int rte_tm_supported(void) > { > return 0; > -- > 2.7.4 > --=20 David Marchand