From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 38DD745B03; Thu, 10 Oct 2024 12:45:25 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 21620402E8; Thu, 10 Oct 2024 12:45:25 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mails.dpdk.org (Postfix) with ESMTP id E9CBF4025E for ; Thu, 10 Oct 2024 12:45:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1728557123; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7v4gq1PM0BAx8H9yU7BF12koVs3UBikrbhv0XU+nLV0=; b=fGlHsHXvYIFJBRxiiq0OC0E+lZ8dqxuClVqYyEI7FQ6CavTEm1T1GaQKjqoix9gDHIapNx Bkb9ch+v0Q6KwEaX67U937ESfct1egnFIqO7W3g8eKEI4mrXlb6FBW/py+B5aKHt76XKXO F5HiAVO2SHKYy8j+cMlN38RLjbcgeu0= Received: from mail-lf1-f72.google.com (mail-lf1-f72.google.com [209.85.167.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-360-jJ9JS0UiMY2IpZ1Igfqe9A-1; Thu, 10 Oct 2024 06:45:22 -0400 X-MC-Unique: jJ9JS0UiMY2IpZ1Igfqe9A-1 Received: by mail-lf1-f72.google.com with SMTP id 2adb3069b0e04-5390f02e11bso768243e87.0 for ; Thu, 10 Oct 2024 03:45:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728557120; x=1729161920; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7v4gq1PM0BAx8H9yU7BF12koVs3UBikrbhv0XU+nLV0=; b=Jt9xUBlwGRCZUJPv9tD3gon/GSMsJ0mofzyMbsDokzLVciEwf1SMDESudEmF2+UwEr 0wfmdSJY3VkIvJxEoW9A0H5OJG/dl+wEudxUh7f5PQY3fy0VdY0uepq8g0+GFawFG+3c nWhv/3XNmZCjJFRXay4fzhKcjEqkOGWQwaTLUbAY+sm7c9LPd7am9wsxgF6ud+7zxGKw r9C6K8ncGWR5JG5WtUPUNrO0ZmfmhBiitfceXMT3GE6YedeAfJ9FAqznadexKP9n6Ft4 uhg5KqWeCF+8+bCJ4cpTO8pZpLbaBSdTWBiHgiaq35EhxoSuvI1FAu8sm3CZXj32UdiY 3fZg== X-Gm-Message-State: AOJu0YzEe5lIwTe9eDuSrcfX2NVcIeN3CQOz+8R3LMtrr2Xh918MFPiG GBunZvlJX2GqTk/aIpmnWpsU3BRo3eDwZURjrEd150XcwwnOBsNB4ceNnwn+H+EzA5wDnVT5SW1 1mJgcxB0f57v4WQQANgEzTEGJkoR2ZNtGeofO6ai7xRoASU/CROh4vnL3ktXoHyuZY8YMiBQsid lk3kJlMxWK9U47eCg= X-Received: by 2002:ac2:4e0b:0:b0:539:a4ef:6752 with SMTP id 2adb3069b0e04-539c4892c1emr4073011e87.6.1728557120467; Thu, 10 Oct 2024 03:45:20 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHWFK+Q7l+19IRQnbQghktScRwl7kO8RB8Yz6zaDboGmRDpqdYut19/HAqnOoxUqnoMZDGnKILD/6NLYx0YTQ0= X-Received: by 2002:ac2:4e0b:0:b0:539:a4ef:6752 with SMTP id 2adb3069b0e04-539c4892c1emr4072976e87.6.1728557119961; Thu, 10 Oct 2024 03:45:19 -0700 (PDT) MIME-Version: 1.0 References: <20240920062437.738706-2-mattias.ronnblom@ericsson.com> <20240920104754.739033-1-mattias.ronnblom@ericsson.com> <20240920104754.739033-7-mattias.ronnblom@ericsson.com> In-Reply-To: <20240920104754.739033-7-mattias.ronnblom@ericsson.com> From: David Marchand Date: Thu, 10 Oct 2024 12:45:08 +0200 Message-ID: Subject: Re: [PATCH v12 6/7] eal: add unit tests for atomic bit access functions To: =?UTF-8?Q?Mattias_R=C3=B6nnblom?= Cc: dev@dpdk.org, hofors@lysator.liu.se, Heng Wang , Stephen Hemminger , Tyler Retzlaff , =?UTF-8?Q?Morten_Br=C3=B8rup?= , Jack Bond-Preston , Chengwen Feng X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, Sep 20, 2024 at 12:57=E2=80=AFPM Mattias R=C3=B6nnblom wrote: > + static int \ > + run_parallel_test_and_modify ## size(void *arg) \ > + { \ > + struct parallel_test_and_set_lcore ## size *lcore =3D arg= ; \ > + uint64_t deadline =3D rte_get_timer_cycles() + = \ > + PARALLEL_TEST_RUNTIME * rte_get_timer_hz(); \ > + do { \ > + bool old_value; \ > + bool new_value =3D rte_rand() & 1; = \ > + bool use_assign =3D rte_rand() & 1; = \ > + \ > + if (use_assign) \ > + old_value =3D rte_bit_atomic_test_and_ass= ign( \ > + lcore->word, lcore->bit, new_valu= e, \ > + rte_memory_order_relaxed); \ > + else \ > + old_value =3D new_value ? = \ > + rte_bit_atomic_test_and_set( \ > + lcore->word, lcore->bit, = \ > + rte_memory_order_relaxed)= : \ > + rte_bit_atomic_test_and_clear( \ > + lcore->word, lcore->bit, = \ > + rte_memory_order_relaxed)= ; \ > + if (old_value !=3D new_value) = \ > + lcore->flips++; \ > + } while (rte_get_timer_cycles() < deadline); \ > + \ > + return 0; \ > + } \ > + \ > + static int \ > + test_bit_atomic_parallel_test_and_modify ## size(void) \ > + { \ > + unsigned int worker_lcore_id; \ > + uint ## size ## _t word =3D 0; = \ > + unsigned int bit =3D rte_rand_max(size); = \ > + struct parallel_test_and_set_lcore ## size lmain =3D { = \ > + .word =3D &word, = \ > + .bit =3D bit = \ > + }; \ > + struct parallel_test_and_set_lcore ## size lworker =3D { = \ > + .word =3D &word, = \ > + .bit =3D bit = \ > + }; \ > + \ > + if (rte_lcore_count() < 2) { \ > + printf("Need multiple cores to run parallel test.= \n"); \ > + return TEST_SKIPPED; \ > + } \ > + \ > + worker_lcore_id =3D rte_get_next_lcore(-1, 1, 0); = \ > + \ > + int rc =3D rte_eal_remote_launch(run_parallel_test_and_mo= dify ## size, \ > + &lworker, worker_lcore_id)= ; \ > + TEST_ASSERT(rc =3D=3D 0, "Worker thread launch failed"); = \ > + \ > + run_parallel_test_and_modify ## size(&lmain); \ > + \ > + rte_eal_mp_wait_lcore(); \ > + \ > + uint64_t total_flips =3D lmain.flips + lworker.flips; = \ > + bool expected_value =3D total_flips % 2; = \ > + \ > + TEST_ASSERT(expected_value =3D=3D rte_bit_test(&word, bit= ), \ > + "After %"PRId64" flips, the bit value " \ > + "should be %d", total_flips, expected_value);= \ > + \ > + uint64_t expected_word =3D 0; = \ > + rte_bit_assign(&expected_word, bit, expected_value); \ > + \ > + TEST_ASSERT(expected_word =3D=3D word, "Untouched bits ha= ve " \ > + "changed value"); \ > + \ > + return TEST_SUCCESS; \ > + } > + > +GEN_TEST_BIT_PARALLEL_TEST_AND_MODIFY(32) > +GEN_TEST_BIT_PARALLEL_TEST_AND_MODIFY(64) It appears this test failed once in the CI for an unrelated series (uAPI kernel header import): https://lab.dpdk.org/results/dashboard/testruns/logs/1385993/ + TestCase [ 0] : test_bit_access32 succeeded + TestCase [ 1] : test_bit_access64 succeeded + TestCase [ 2] : test_bit_access32 succeeded + TestCase [ 3] : test_bit_access64 succeeded + TestCase [ 4] : test_bit_v_access32 succeeded + TestCase [ 5] : test_bit_v_access64 succeeded + TestCase [ 6] : test_bit_atomic_access32 succeeded + TestCase [ 7] : test_bit_atomic_access64 succeeded + TestCase [ 8] : test_bit_atomic_v_access32 succeeded + TestCase [ 9] : test_bit_atomic_v_access64 succeeded + TestCase [10] : test_bit_atomic_parallel_assign32 succeeded + TestCase [11] : test_bit_atomic_parallel_assign64 succeeded + TestCase [12] : test_bit_atomic_parallel_test_and_modify32 failed + TestCase [13] : test_bit_atomic_parallel_test_and_modify64 succeeded + TestCase [14] : test_bit_atomic_parallel_flip32 succeeded + TestCase [15] : test_bit_atomic_parallel_flip64 succeeded + TestCase [16] : test_bit_relaxed_set succeeded + TestCase [17] : test_bit_relaxed_clear succeeded + TestCase [18] : test_bit_relaxed_test_set_clear succeeded EAL: Test assert test_bit_atomic_parallel_test_and_modify32 line 236 failed: After 1070523 flips, the bit value should be 1 Please have a look. --=20 David Marchand