From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B9499A058A; Wed, 25 Mar 2020 09:37:14 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 19F97374C; Wed, 25 Mar 2020 09:37:14 +0100 (CET) Received: from us-smtp-delivery-74.mimecast.com (us-smtp-delivery-74.mimecast.com [63.128.21.74]) by dpdk.org (Postfix) with ESMTP id AA5C21E34 for ; Wed, 25 Mar 2020 09:37:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1585125432; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OPtfXakXwjGhUWC4MWfwVQzBr009EMr77VBcurhVz5k=; b=ZJEVEjfD0/ZLvmo9HMMaS4ZMKl1isCuynDf1CgPMbNE7bQO/kQzrnO5sY1q8O06ijeWFeh otubiQec04b2R98souix6pMp6pMuXuC96U1hbJyHIK6XWmcN7/Yq5qXW+Ntp4bt6D3iqDy 3VHlmWPC17sEkReDoWnGuIc5OS2XNDk= Received: from mail-ua1-f69.google.com (mail-ua1-f69.google.com [209.85.222.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-484-M-3Q-HVfOiisZDVqahHvEA-1; Wed, 25 Mar 2020 04:37:09 -0400 X-MC-Unique: M-3Q-HVfOiisZDVqahHvEA-1 Received: by mail-ua1-f69.google.com with SMTP id a9so607474uan.18 for ; Wed, 25 Mar 2020 01:37:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=OceIN62xaRUbFKnwHYP2m0leZVrkAFu50wHCGR2ybSw=; b=aA5CciNMojMDgCvq4a3fmbtEpU2PCafSwpYfPAznsjt2viVr5/8I+QffgUbcU2Trn/ 0PCsb9xqn+fthZ1H60yXuR2WISCo+lRww6xHzYcpz5IgnPEV+Krvm5aU9SNWLQCTLjlU Cdh+CgqgukXdhu4LaDsjPtESGin+bz/6zvNGmdU/Z6zNr9rBgOBgU4+JVhRAZ6tuaRKe gY4Cg3fO5e5/JIyhKhYeBZAw59AgLwxRUgrgiih6q2FmDxEPkzsWVwufOmtNWDRECecW v1LayilsafUjD1+spx8HP8uoxN257NEIqefUp+E6+wYaZlxzPacBey99qqtVCGPsowNx jEjQ== X-Gm-Message-State: ANhLgQ2eSC11wa5BMiyEz0gy9yKVno7rlHXeakftrwIRsDmbsCdYvDBd oGWaxlaElYziMLclEW2OR5wGHg5Ji87t3R9ai+ULOduI2v5SvF6maCNDqFyWbOqCSJkQ69lNP3i BBypHnXZPxnoInvxNQGY= X-Received: by 2002:a67:905:: with SMTP id 5mr1619231vsj.105.1585125428467; Wed, 25 Mar 2020 01:37:08 -0700 (PDT) X-Google-Smtp-Source: ADFU+vtFZXQ4jsZXwmBHDRJ1ORsxcxvcPT9xRrt9zQp1QrPcdbz6hKZEOetz2kmNC1i1wSewZ3eIXGlCbFfi9h/oIZQ= X-Received: by 2002:a67:905:: with SMTP id 5mr1619218vsj.105.1585125428184; Wed, 25 Mar 2020 01:37:08 -0700 (PDT) MIME-Version: 1.0 References: <20200324114921.7184-1-kevin.laatz@intel.com> In-Reply-To: <20200324114921.7184-1-kevin.laatz@intel.com> From: David Marchand Date: Wed, 25 Mar 2020 09:36:57 +0100 Message-ID: To: Kevin Laatz Cc: dev , Bruce Richardson , Van Haaren Harry X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [dpdk-dev] [PATCH 00/17] Add CPU flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Mar 24, 2020 at 12:49 PM Kevin Laatz wrote: > This patch set adds CPU flags which will enable the detection of ISA > features available on more recent x86 based CPUs. > > The CPUID leaf information can be found in Section 1.7 of this > document: > https://software.intel.com/sites/default/files/managed/c5/15/architecture= -instruction-set-extensions-programming-reference.pdf > > Kevin Laatz (17): > eal/cpuflags: add avx512 doubleword and quadword > eal/cpuflags: add avx512 integer fused multiply-add > eal/cpuflags: add avx512 conflict detection > eal/cpuflags: add avx512 byte and word > eal/cpuflags: add avx512 vector length > eal/cpuflags: add avx512 vector bit manipulation > eal/cpuflags: add avx512 vector bit manipulation 2 > eal/cpuflags: add galois field new instructions > eal/cpuflags: add vector AES > eal/cpuflags: add vector carry-less multiply > eal/cpuflags: add avx512 vector neural network instructions > eal/cpuflags: add avx512 bit algorithms > eal/cpuflags: add avx512 vector popcount > eal/cpuflags: add cache line demote > eal/cpuflags: add direct store instructions > eal/cpuflags: add direct store instructions 64B > eal/cpuflags: add avx512 two register intersection > > lib/librte_eal/common/arch/x86/rte_cpuflags.c | 18 ++++++++++++++++++ > .../common/include/arch/x86/rte_cpuflags.h | 18 ++++++++++++++++++ > 2 files changed, 36 insertions(+) You are just adding definitions, the review should be straightforward for guys in the know. I can see little value in splitting in that many patches. --=20 David Marchand