From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5CA01A0528; Thu, 9 Jul 2020 15:48:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 72E931E906; Thu, 9 Jul 2020 15:48:37 +0200 (CEST) Received: from us-smtp-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.120]) by dpdk.org (Postfix) with ESMTP id 457041E900 for ; Thu, 9 Jul 2020 15:48:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1594302515; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=1MrYzYF8j1k2jo94PGCoJR0izIR2jtrSSy5Y+mbQ7KU=; b=FQuHt/UpG0fT2e4jhXqywU/Cdj+xLZ7oLNFa6DY4/D7iFKQAePgAd6zjXejGaksppHAr8G jGcYU9kN+5uA859jg+VEBX4uWuSwE4Fbhd6i+HQC9TQKEXyCjm42v+zN7Uxze5KoPv/DpB DlsjCCmUzvc7LFcAdsxPlC9mM8DOgDs= Received: from mail-ua1-f69.google.com (mail-ua1-f69.google.com [209.85.222.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-207-HgRr_htWM1eIqdvuzwpNBQ-1; Thu, 09 Jul 2020 09:48:34 -0400 X-MC-Unique: HgRr_htWM1eIqdvuzwpNBQ-1 Received: by mail-ua1-f69.google.com with SMTP id c13so887876uae.0 for ; Thu, 09 Jul 2020 06:48:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=1MrYzYF8j1k2jo94PGCoJR0izIR2jtrSSy5Y+mbQ7KU=; b=Br8XIIJzNB6EaeqO3uwBslYCNbQtqyzE9uof8eF+es4+3YBDAMnSDgFuigAirlivsr 5Aut5XbHoDslzPFwzTQ3aj+BQYnVV+JwEu+XwL5VIofhS3P0wrwyBzlqDH0CybY8gosi EDQNdu+9Q9s3v104LCajx6okZkutJ+bFwbv3RR6xPABIoI0te1ap7+AqVjtycIC+Ay4v w5UOTzYdJ30C8R/vBe3wfLvgBSWKUd8BZ3UVv4bUNuMch7xUp6dyiTey6JzSVSyHkc0h 4FooHlLCjREyI41c41YuE3Yfg+K6XRrEtHCenkoHOptTVc+OrDE2KucGTwyue4jgceqs e82g== X-Gm-Message-State: AOAM531R4wbZ6E+4LmxZLmDULNgLqTXTwlB0JGyqsQQCakZvJdEK19p5 vdEhjMRH1k6AN2t2GE2pbP13KQl3T+yAiPwIDeuxU+G8ccPJN4nk02tGqgOayjX2VmoFpFR5aRL VJb6oHe0RnhM/H9J8Jjw= X-Received: by 2002:a67:26c2:: with SMTP id m185mr46141343vsm.39.1594302513032; Thu, 09 Jul 2020 06:48:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzRFqwCuZP2Z6Ib9hMbqmrmcOtMn0d4fgqypckTW3/ZR43cjG7LIIyE08br6Asq0pvprG8rnZv48j4XlpLamfo= X-Received: by 2002:a67:26c2:: with SMTP id m185mr46141325vsm.39.1594302512734; Thu, 09 Jul 2020 06:48:32 -0700 (PDT) MIME-Version: 1.0 References: <98b10e12eb46cff65494a94eaf0f04b2dcefd245.1594238610.git.vladimir.medvedkin@intel.com> In-Reply-To: <98b10e12eb46cff65494a94eaf0f04b2dcefd245.1594238610.git.vladimir.medvedkin@intel.com> From: David Marchand Date: Thu, 9 Jul 2020 15:48:21 +0200 Message-ID: To: Vladimir Medvedkin Cc: dev , "Ananyev, Konstantin" , Bruce Richardson X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v4 1/8] eal: introduce zmm type for AVX 512-bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Wed, Jul 8, 2020 at 10:17 PM Vladimir Medvedkin wrote: > > New data type to manipulate 512 bit AVX values. The title mentions a "zmm" type that is not added by this patch. Maybe instead, "eal/x86: introduce AVX 512-bit type" > > Signed-off-by: Vladimir Medvedkin > Acked-by: Konstantin Ananyev > --- > lib/librte_eal/x86/include/rte_vect.h | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h > index df5a60762..ae59126bc 100644 > --- a/lib/librte_eal/x86/include/rte_vect.h > +++ b/lib/librte_eal/x86/include/rte_vect.h > @@ -13,6 +13,7 @@ > > #include > #include > +#include > #include "generic/rte_vect.h" > > #if (defined(__ICC) || \ > @@ -90,6 +91,26 @@ __extension__ ({ \ > }) > #endif /* (defined(__ICC) && __ICC < 1210) */ > > +#ifdef __AVX512F__ > + > +typedef __m512i __x86_zmm_t; We don't need this interim type, using the native __m512 is enough afaics. Looking at the whole applied series: $ git grep -lw __x86_zmm_t lib/librte_eal/x86/include/rte_vect.h > + > +#define ZMM_SIZE (sizeof(__x86_zmm_t)) > +#define ZMM_MASK (ZMM_SIZE - 1) Macros in a public header need a RTE_ prefix + this is x86 specific, then RTE_X86_. Looking at the whole applied series: $ git grep -lw ZMM_SIZE lib/librte_eal/x86/include/rte_vect.h $ git grep -lw ZMM_MASK lib/librte_eal/x86/include/rte_vect.h So I wonder if we need to export it or we can instead just #undef after the struct definition. > + > +typedef union __rte_x86_zmm { > + __x86_zmm_t z; > + ymm_t y[ZMM_SIZE / sizeof(ymm_t)]; > + xmm_t x[ZMM_SIZE / sizeof(xmm_t)]; > + uint8_t u8[ZMM_SIZE / sizeof(uint8_t)]; > + uint16_t u16[ZMM_SIZE / sizeof(uint16_t)]; > + uint32_t u32[ZMM_SIZE / sizeof(uint32_t)]; > + uint64_t u64[ZMM_SIZE / sizeof(uint64_t)]; > + double pd[ZMM_SIZE / sizeof(double)]; > +} __rte_aligned(ZMM_SIZE) __rte_x86_zmm_t; I don't understand this forced alignment statement. Would not natural alignment be enough, since all fields in this union have the same size? -- David Marchand