From: David Marchand <david.marchand@redhat.com>
To: Pavan Nikhilesh <pbhagavatula@marvell.com>
Cc: "Ruifeng Wang (Arm Technology China)" <ruifeng.wang@arm.com>,
Yipeng Wang <yipeng1.wang@intel.com>,
Sameh Gobriel <sameh.gobriel@intel.com>,
Bruce Richardson <bruce.richardson@intel.com>,
Vladimir Medvedkin <vladimir.medvedkin@intel.com>,
Jerin Jacob Kollanukkaran <jerinj@marvell.com>,
dev <dev@dpdk.org>
Subject: Re: [PATCH v8 2/2] hash: unify crc32 selection for x86 and Arm
Date: Tue, 3 May 2022 16:33:03 +0200 [thread overview]
Message-ID: <CAJFAV8z8=YbyUXzO6j0SA2BQ74VVXvDFi8K_CZkpQCfP0492EA@mail.gmail.com> (raw)
In-Reply-To: <20220429161700.2145-2-pbhagavatula@marvell.com>
On Fri, Apr 29, 2022 at 6:17 PM Pavan Nikhilesh
<pbhagavatula@marvell.com> wrote:
>
> Merge crc32 hash calculation public API implementation for x86 and Arm.
> Select the best available CRC32 algorithm when unsupported algorithm
> on a given CPU architecture is requested by an application.
>
> Previously, if an application directly includes `rte_crc_arm64.h`
> without including `rte_hash_crc.h` it will fail to compile.
On this topic, a followup patch could add a check to those internal
headers, to ensure _RTE_HASH_CRC_H_ is defined and #error otherwise.
Like what is done in lib/eal/x86/include/rte_atomic_64.h, for example.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> ---
> lib/hash/meson.build | 1 +
> lib/hash/rte_crc_arm64.h | 69 +++---------------
> lib/hash/rte_crc_generic.h | 72 ++++++++++++++++++
> lib/hash/rte_crc_x86.h | 89 +++++++++++++++++++++++
> lib/hash/rte_hash_crc.h | 145 ++++++++++---------------------------
> 5 files changed, 210 insertions(+), 166 deletions(-)
> create mode 100644 lib/hash/rte_crc_generic.h
>
> diff --git a/lib/hash/meson.build b/lib/hash/meson.build
> index ff13e2c7f9..b36c8b0c01 100644
> --- a/lib/hash/meson.build
> +++ b/lib/hash/meson.build
> @@ -13,6 +13,7 @@ indirect_headers += files(
> 'rte_crc_sw.h',
> 'rte_crc_x86.h',
> 'rte_crc_arm64.h',
> + 'rte_crc_generic.h',
> 'rte_thash_x86_gfni.h',
> )
>
> diff --git a/lib/hash/rte_crc_arm64.h b/lib/hash/rte_crc_arm64.h
> index b4628cfc09..172894335f 100644
> --- a/lib/hash/rte_crc_arm64.h
> +++ b/lib/hash/rte_crc_arm64.h
> @@ -2,23 +2,8 @@
> * Copyright(c) 2015 Cavium, Inc
> */
>
> -#ifndef _RTE_CRC_ARM64_H_
> -#define _RTE_CRC_ARM64_H_
> -
> -/**
> - * @file
> - *
> - * RTE CRC arm64 Hash
> - */
> -
> -#ifdef __cplusplus
> -extern "C" {
> -#endif
> -
> -#include <stdint.h>
> -#include <rte_cpuflags.h>
> -#include <rte_branch_prediction.h>
> -#include <rte_common.h>
> +#ifndef _HASH_CRC_ARM64_H_
> +#define _HASH_CRC_ARM64_H_
>
> static inline uint32_t
> crc32c_arm64_u8(uint8_t data, uint32_t init_val)
> @@ -61,40 +46,8 @@ crc32c_arm64_u64(uint64_t data, uint32_t init_val)
> }
>
> /**
> - * Allow or disallow use of arm64 SIMD instrinsics for CRC32 hash
> - * calculation.
> - *
> - * @param alg
> - * An OR of following flags:
> - * - (CRC32_SW) Don't use arm64 crc intrinsics
> - * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available
> - *
> - */
> -static inline void
> -rte_hash_crc_set_alg(uint8_t alg)
> -{
> - switch (alg) {
> - case CRC32_ARM64:
> - if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32))
> - alg = CRC32_SW;
> - /* fall-through */
> - case CRC32_SW:
> - crc32_alg = alg;
> - /* fall-through */
> - default:
> - break;
> - }
> -}
> -
> -/* Setting the best available algorithm */
> -RTE_INIT(rte_hash_crc_init_alg)
> -{
> - rte_hash_crc_set_alg(CRC32_ARM64);
> -}
> -
> -/**
> - * Use single crc32 instruction to perform a hash on a 1 byte value.
> - * Fall back to software crc32 implementation in case arm64 crc intrinsics is
> + * Use single crc32 instruction to perform a hash on a byte value.
> + * Fall back to software crc32 implementation in case ARM CRC is
> * not supported
> *
> * @param data
> @@ -115,7 +68,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
>
> /**
> * Use single crc32 instruction to perform a hash on a 2 bytes value.
> - * Fall back to software crc32 implementation in case arm64 crc intrinsics is
> + * Fall back to software crc32 implementation in case ARM CRC is
> * not supported
> *
> * @param data
> @@ -136,7 +89,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
>
> /**
> * Use single crc32 instruction to perform a hash on a 4 byte value.
> - * Fall back to software crc32 implementation in case arm64 crc intrinsics is
> + * Fall back to software crc32 implementation in case ARM CRC is
> * not supported
> *
> * @param data
> @@ -157,7 +110,7 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
>
> /**
> * Use single crc32 instruction to perform a hash on a 8 byte value.
> - * Fall back to software crc32 implementation in case arm64 crc intrinsics is
> + * Fall back to software crc32 implementation in case ARM CRC is
> * not supported
> *
> * @param data
> @@ -170,14 +123,10 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
> static inline uint32_t
> rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
> {
> - if (likely(crc32_alg == CRC32_ARM64))
> + if (likely(crc32_alg & CRC32_ARM64))
> return crc32c_arm64_u64(data, init_val);
>
> return crc32c_2words(data, init_val);
> }
>
> -#ifdef __cplusplus
> -}
> -#endif
> -
> -#endif /* _RTE_CRC_ARM64_H_ */
> +#endif /* _HASH_CRC_ARM64_H_ */
> diff --git a/lib/hash/rte_crc_generic.h b/lib/hash/rte_crc_generic.h
> new file mode 100644
> index 0000000000..0c55947896
> --- /dev/null
> +++ b/lib/hash/rte_crc_generic.h
> @@ -0,0 +1,72 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2022 Marvell.
> + */
> +
> +#ifndef _HASH_CRC_GENERIC_H_
> +#define _HASH_CRC_GENERIC_H_
> +
> +/**
> + * Software crc32 implementation for 1 byte value.
> + *
> + * @param data
> + * Data to perform hash on.
> + * @param init_val
> + * Value to initialise hash generator.
> + * @return
> + * 32bit calculated hash value.
> + */
> +static inline uint32_t
> +rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
> +{
> + return crc32c_1byte(data, init_val);
> +}
> +
> +/**
> + * Software crc32 implementation for 2 byte value.
> + *
> + * @param data
> + * Data to perform hash on.
> + * @param init_val
> + * Value to initialise hash generator.
> + * @return
> + * 32bit calculated hash value.
> + */
> +static inline uint32_t
> +rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
> +{
> + return crc32c_2bytes(data, init_val);
> +}
> +
> +/**
> + * Software crc32 implementation for 4 byte value.
> + *
> + * @param data
> + * Data to perform hash on.
> + * @param init_val
> + * Value to initialise hash generator.
> + * @return
> + * 32bit calculated hash value.
> + */
> +static inline uint32_t
> +rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
> +{
> + return crc32c_1word(data, init_val);
> +}
> +
> +/**
> + * Software crc32 implementation for 8 byte value.
> + *
> + * @param data
> + * Data to perform hash on.
> + * @param init_val
> + * Value to initialise hash generator.
> + * @return
> + * 32bit calculated hash value.
> + */
> +static inline uint32_t
> +rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
> +{
> + return crc32c_2words(data, init_val);
> +}
> +
> +#endif
> diff --git a/lib/hash/rte_crc_x86.h b/lib/hash/rte_crc_x86.h
> index b80a742afa..19eb3584e7 100644
> --- a/lib/hash/rte_crc_x86.h
> +++ b/lib/hash/rte_crc_x86.h
> @@ -59,4 +59,93 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
> return (uint32_t)init_val;
> }
>
> +/**
> + * Use single crc32 instruction to perform a hash on a byte value.
> + * Fall back to software crc32 implementation in case SSE4.2 is
> + * not supported
> + *
> + * @param data
> + * Data to perform hash on.
> + * @param init_val
> + * Value to initialise hash generator.
> + * @return
> + * 32bit calculated hash value.
> + */
> +static inline uint32_t
> +rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
> +{
> + if (likely(crc32_alg & CRC32_SSE42))
> + return crc32c_sse42_u8(data, init_val);
> +
> + return crc32c_1byte(data, init_val);
> +}
> +
> +/**
> + * Use single crc32 instruction to perform a hash on a 2 bytes value.
> + * Fall back to software crc32 implementation in case SSE4.2 is
> + * not supported
> + *
> + * @param data
> + * Data to perform hash on.
> + * @param init_val
> + * Value to initialise hash generator.
> + * @return
> + * 32bit calculated hash value.
> + */
> +static inline uint32_t
> +rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
> +{
> + if (likely(crc32_alg & CRC32_SSE42))
> + return crc32c_sse42_u16(data, init_val);
> +
> + return crc32c_2bytes(data, init_val);
> +}
> +
> +/**
> + * Use single crc32 instruction to perform a hash on a 4 byte value.
> + * Fall back to software crc32 implementation in case SSE4.2 is
> + * not supported
> + *
> + * @param data
> + * Data to perform hash on.
> + * @param init_val
> + * Value to initialise hash generator.
> + * @return
> + * 32bit calculated hash value.
> + */
> +static inline uint32_t
> +rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
> +{
> + if (likely(crc32_alg & CRC32_SSE42))
> + return crc32c_sse42_u32(data, init_val);
> +
> + return crc32c_1word(data, init_val);
> +}
> +
> +/**
> + * Use single crc32 instruction to perform a hash on a 8 byte value.
> + * Fall back to software crc32 implementation in case SSE4.2 is
> + * not supported
> + *
> + * @param data
> + * Data to perform hash on.
> + * @param init_val
> + * Value to initialise hash generator.
> + * @return
> + * 32bit calculated hash value.
> + */
> +static inline uint32_t
> +rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
> +{
> +#ifdef RTE_ARCH_X86_64
> + if (likely(crc32_alg == CRC32_SSE42_x64))
> + return crc32c_sse42_u64(data, init_val);
> +#endif
> +
> + if (likely(crc32_alg & CRC32_SSE42))
> + return crc32c_sse42_u64_mimic(data, init_val);
> +
> + return crc32c_2words(data, init_val);
> +}
> +
> #endif
> diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h
> index 308fdde414..cd9ec17082 100644
> --- a/lib/hash/rte_hash_crc.h
> +++ b/lib/hash/rte_hash_crc.h
> @@ -16,10 +16,12 @@ extern "C" {
> #endif
>
> #include <stdint.h>
> -#include <rte_config.h>
> -#include <rte_cpuflags.h>
> +
> #include <rte_branch_prediction.h>
> #include <rte_common.h>
> +#include <rte_config.h>
> +#include <rte_cpuflags.h>
> +#include <rte_log.h>
>
> #include "rte_crc_sw.h"
>
> @@ -33,136 +35,67 @@ static uint8_t crc32_alg = CRC32_SW;
>
> #if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
> #include "rte_crc_arm64.h"
> -#else
> +#elif defined(RTE_ARCH_X86)
> #include "rte_crc_x86.h"
> +#else
> +#include "rte_crc_generic.h"
> +#endif
>
> /**
> - * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash
> + * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash
> * calculation.
> *
> * @param alg
> * An OR of following flags:
> - * - (CRC32_SW) Don't use SSE4.2 intrinsics
> + * - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non-[x86/ARMv8])
> * - (CRC32_SSE42) Use SSE4.2 intrinsics if available
> - * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default)
> + * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default x86)
> + * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8)
> *
> */
> static inline void
> rte_hash_crc_set_alg(uint8_t alg)
> {
> -#if defined(RTE_ARCH_X86)
> - if (alg == CRC32_SSE42_x64 &&
> - !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
> - alg = CRC32_SSE42;
> -#endif
> - crc32_alg = alg;
> -}
> + crc32_alg = CRC32_SW;
>
> -/* Setting the best available algorithm */
> -RTE_INIT(rte_hash_crc_init_alg)
> -{
> - rte_hash_crc_set_alg(CRC32_SSE42_x64);
> -}
> + if (alg == CRC32_SW)
> + return;
>
> -/**
> - * Use single crc32 instruction to perform a hash on a byte value.
> - * Fall back to software crc32 implementation in case SSE4.2 is
> - * not supported
> - *
> - * @param data
> - * Data to perform hash on.
> - * @param init_val
> - * Value to initialise hash generator.
> - * @return
> - * 32bit calculated hash value.
> - */
> -static inline uint32_t
> -rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
By moving all these sw helpers into a new file, the rendered
documentation loses their descriptions.
We should keep a declaration of each function of the API under a
#ifdef __DOXYGEN__ in rte_hash_crc.h.
If there is no objection, I'll fix by keeping only the generic
description of each function, like shown below:
diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h
index cd9ec17082..86c341a7a4 100644
--- a/lib/hash/rte_hash_crc.h
+++ b/lib/hash/rte_hash_crc.h
@@ -96,6 +96,62 @@ RTE_INIT(rte_hash_crc_init_alg)
#endif
}
+#ifdef __DOXYGEN__
+
+/**
+ * Use single crc32 instruction to perform a hash on a byte value.
+ *
+ * @param data
+ * Data to perform hash on.
+ * @param init_val
+ * Value to initialise hash generator.
+ * @return
+ * 32bit calculated hash value.
+ */
+static inline uint32_t
+rte_hash_crc_1byte(uint8_t data, uint32_t init_val);
+
[snip]
+static inline uint32_t
+rte_hash_crc_8byte(uint64_t data, uint32_t init_val);
+
+#endif /* __DOXYGEN__ */
+
/**
* Calculate CRC32 hash on user-supplied byte array.
*
--
David Marchand
next prev parent reply other threads:[~2022-05-03 14:33 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-29 18:05 [dpdk-dev] [RFC] hash: unify crc32 API header for x86 and ARM pbhagavatula
2020-04-30 9:14 ` Van Haaren, Harry
2020-04-30 9:27 ` Pavan Nikhilesh Bhagavatula
2020-05-06 22:02 ` Wang, Yipeng1
2020-05-10 22:49 ` Pavan Nikhilesh Bhagavatula
2020-05-08 12:55 ` Ananyev, Konstantin
2020-05-10 22:53 ` Pavan Nikhilesh Bhagavatula
2020-05-11 9:46 ` Ananyev, Konstantin
2020-05-11 10:23 ` Pavan Nikhilesh Bhagavatula
2020-05-11 10:27 ` Ananyev, Konstantin
2020-05-11 10:57 ` Pavan Nikhilesh Bhagavatula
2020-05-11 12:10 ` Ananyev, Konstantin
2020-05-11 12:32 ` Pavan Nikhilesh Bhagavatula
2020-05-12 20:40 ` [dpdk-dev] [RFC v2] " pbhagavatula
2020-05-13 3:04 ` Ruifeng Wang
2020-05-13 13:22 ` Ananyev, Konstantin
2021-10-03 23:00 ` [dpdk-dev] [PATCH v3 1/2] hash: split x86 and SW hash CRC intrinsics pbhagavatula
2021-10-03 23:00 ` [dpdk-dev] [PATCH v3 2/2] hash: unify crc32 selection for x86 and Arm pbhagavatula
2021-10-04 5:52 ` [dpdk-dev] [PATCH v4 1/2] hash: split x86 and SW hash CRC intrinsics pbhagavatula
2021-10-04 5:52 ` [dpdk-dev] [PATCH v4 2/2] hash: unify crc32 selection for x86 and Arm pbhagavatula
2021-10-18 9:21 ` Ruifeng Wang
2021-11-05 10:10 ` [dpdk-dev] [PATCH v5 1/2] hash: split x86 and SW hash CRC intrinsics pbhagavatula
2021-11-05 10:10 ` [dpdk-dev] [PATCH v5 2/2] hash: unify crc32 selection for x86 and Arm pbhagavatula
2022-01-04 9:12 ` Ruifeng Wang
2022-04-08 9:16 ` David Marchand
2021-11-16 14:57 ` [dpdk-dev] [PATCH v5 1/2] hash: split x86 and SW hash CRC intrinsics David Marchand
2022-04-27 13:35 ` [PATCH v6 " Pavan Nikhilesh
2022-04-27 13:35 ` [PATCH v6 2/2] hash: unify crc32 selection for x86 and Arm Pavan Nikhilesh
2022-04-27 15:22 ` [PATCH v7 1/2] hash: split x86 and SW hash CRC intrinsics Pavan Nikhilesh
2022-04-27 15:22 ` [PATCH v7 2/2] hash: unify crc32 selection for x86 and Arm Pavan Nikhilesh
2022-04-29 7:19 ` Ruifeng Wang
2022-04-29 7:18 ` [PATCH v7 1/2] hash: split x86 and SW hash CRC intrinsics Ruifeng Wang
2022-04-29 13:29 ` David Marchand
2022-04-29 15:56 ` [EXT] " Pavan Nikhilesh Bhagavatula
2022-04-29 16:16 ` [PATCH v8 " Pavan Nikhilesh
2022-04-29 16:17 ` [PATCH v8 2/2] hash: unify crc32 selection for x86 and Arm Pavan Nikhilesh
2022-05-03 14:33 ` David Marchand [this message]
2022-05-04 2:53 ` Wang, Yipeng1
2022-05-11 14:23 ` David Marchand
2022-05-04 2:19 ` [PATCH v8 1/2] hash: split x86 and SW hash CRC intrinsics Wang, Yipeng1
2022-05-13 18:27 ` [PATCH v9 " pbhagavatula
2022-05-13 18:27 ` [PATCH v9 2/2] hash: unify crc32 selection for x86 and Arm pbhagavatula
2022-05-19 14:20 ` David Marchand
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