From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 191C0A0543; Mon, 13 Jun 2022 17:01:32 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B0CE540222; Mon, 13 Jun 2022 17:01:31 +0200 (CEST) Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) by mails.dpdk.org (Postfix) with ESMTP id E051B40150 for ; Mon, 13 Jun 2022 17:01:27 +0200 (CEST) Received: by mail-wr1-f53.google.com with SMTP id k19so7483648wrd.8 for ; Mon, 13 Jun 2022 08:01:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=IPiv2CwwkG2WU6GXlj4OMWqB95Nc/fRCYGaRgHOLge0=; b=om3+sTE0m5yLqoYeYQXwLg/AdaPZsrf7r5FvgBHt9brORAC2sFBOpVJgXdeVjJKAYt YQ3cjW+RpAyPYAEKGhs5vBe9CAgW4p6kEio5VuLozwgVGwdHrgZsODn9SjlqG7zS6d5W SojZ3midvG9ruye5MIRKcbD9KHtMrOc263KLiq63A9OOUaVo4KUr/dwSgjT7hzcX/LjA /D6h9lr4ovSmUHRI51q0+94+RfREGqTno6mlngnAZGd9OY5OPXtCu5oIrDymKZb0NrlJ qG+CoJotubStZbn4SmGuM1yBkjBOyzLox4zuFPCtax9ih0Y6FtcovRy3/4MIWLrA+pZ9 iBxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=IPiv2CwwkG2WU6GXlj4OMWqB95Nc/fRCYGaRgHOLge0=; b=dI3syslql2f+cFDyr8jflBaJkZPlXHNK12AKqHDKG+hABi1OV+9Tk8/vCB3wcJf57a Fr7BZ8Sse9gXZZ7C6iqFOSH9YELiKzkudU/SgMCJvR1aXZAgkZg/G+PcXaJcqWdrfbRr tkLbEjwnZ9t0Vmg/GDloJ8Ro4Z7xSAgdQJ/VXSmCYhanTvT+mu99uY+fEt8oPICQMRhw F/Dr+6b5a1fT7e3wl6pNBbHT9Wc7EqViFr/sV1eKXedIhO0ZnDAiPAhk1xYXkZg4BX4N SXvSbxs3Bm77/E/RkBVXYfPqOAUxFVa24SYCOYqoYffALnybxE0TWejE4vrNgVRWDLHR L7Yw== X-Gm-Message-State: AJIora/jdfuPQO22WAIemGAU+YdEceUpPudDTlwPl03//5iPOvjA2MV+ Lmv42Mwt+La77PEQ5K3wYbFQfRADWxXjjBi/b+4= X-Google-Smtp-Source: AGRyM1v9LRFX+TzjDHJmjFmhuIbswTrEineK3iC45i1q+5wTihis8zruuq4XOqcXHsGO7U+AggCOHZJfIZwXtSxQgvw= X-Received: by 2002:a5d:47c9:0:b0:20f:e7da:6a48 with SMTP id o9-20020a5d47c9000000b0020fe7da6a48mr252518wrc.315.1655132487355; Mon, 13 Jun 2022 08:01:27 -0700 (PDT) MIME-Version: 1.0 References: <20220610155216.81289-1-kevinx.liu@intel.com> <20220610162944.99526-1-kevinx.liu@intel.com> In-Reply-To: From: Ben Magistro Date: Mon, 13 Jun 2022 11:01:16 -0400 Message-ID: Subject: Re: [PATCH v7] net/i40e: add outer VLAN processing To: "Liu, KevinX" Cc: "dev@dpdk.org" , "Zhang, Yuying" , "Xing, Beilei" , "Yang, SteveX" , "Zhang, RobinX" Content-Type: multipart/alternative; boundary="000000000000f7108905e1558f77" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org --000000000000f7108905e1558f77 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Thanks for the information on 8.4. Unfortunately most of NICs are from Dell so will need to push them to produce another update package and would prefer to wait till we know what is required to fix our issue. I loaded 8.6 and 8.7 on one of our test hosts and our issue still exists so will continue pushing the open case we have with Intel as that is where we still think this lies. Cheers, Ben On Sun, Jun 12, 2022 at 10:14 PM Liu, KevinX wrote: > Hi, Ben > > This patch can only take effect after firmware v8.6. It cannot be used on > firmware v8.4 and v8.5. The reason is that the firmware team gave a clear > reply that there are many related bugs in firmware v8.4 and v8.5, and the= y > were fixed in firmware v8.6. The firmware team recommends using v8.6. > > > > Regards > > Kevin > > > > *From:* Ben Magistro > *Sent:* 2022=E5=B9=B46=E6=9C=8810=E6=97=A5 22:27 > *To:* Liu, KevinX > *Cc:* dev@dpdk.org; Zhang, Yuying ; Xing, Beilei = < > beilei.xing@intel.com>; Yang, SteveX ; Zhang, > RobinX > *Subject:* Re: [PATCH v7] net/i40e: add outer VLAN processing > > > > I'm trying to understand if this change is at all related to an issue we > are experiencing with newer firmwares ( > https://mails.dpdk.org/archives/dev/2022-April/238621.html) that happened > to start with 8.4 and affected qinq offload processing. I can say loadin= g > this patch and running testpmd does not seem to have any effect on the > issue we are experiencing. > > > > Side note, there is also a minor typo in the comment block > "i40e_vlan_tpie_set" vs "i40e_vlan_tpid_set". > > > > Thanks > > > > On Fri, Jun 10, 2022 at 4:30 AM Kevin Liu wrote: > > From: Robin Zhang > > Outer VLAN processing is supported after firmware v8.4, kernel driver > also change the default behavior to support this feature. To align with > kernel driver, add support for outer VLAN processing in DPDK. > > But it is forbidden for firmware to change the Inner/Outer VLAN > configuration while there are MAC/VLAN filters in the switch table. > Therefore, we need to clear the MAC table before setting config, > and then restore the MAC table after setting. > > This will not impact on an old firmware. > > Signed-off-by: Robin Zhang > Signed-off-by: Kevin Liu > --- > drivers/net/i40e/i40e_ethdev.c | 94 ++++++++++++++++++++++++++++++++-- > drivers/net/i40e/i40e_ethdev.h | 3 ++ > 2 files changed, 92 insertions(+), 5 deletions(-) > > diff --git a/drivers/net/i40e/i40e_ethdev.c > b/drivers/net/i40e/i40e_ethdev.c > index 755786dc10..4cae163cb9 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -2575,6 +2575,7 @@ i40e_dev_close(struct rte_eth_dev *dev) > struct i40e_hw *hw =3D > I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > struct rte_pci_device *pci_dev =3D RTE_ETH_DEV_TO_PCI(dev); > struct rte_intr_handle *intr_handle =3D pci_dev->intr_handle; > + struct rte_eth_rxmode *rxmode =3D &dev->data->dev_conf.rxmode; > struct i40e_filter_control_settings settings; > struct rte_flow *p_flow; > uint32_t reg; > @@ -2587,6 +2588,18 @@ i40e_dev_close(struct rte_eth_dev *dev) > if (rte_eal_process_type() !=3D RTE_PROC_PRIMARY) > return 0; > > + /* > + * It is a workaround, if the double VLAN is disabled when > + * the program exits, an abnormal error will occur on the > + * NIC. Need to enable double VLAN when dev is closed. > + */ > + if (pf->fw8_3gt) { > + if (!(rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND))= { > + rxmode->offloads |=3D RTE_ETH_RX_OFFLOAD_VLAN_EXT= END; > + i40e_vlan_offload_set(dev, > RTE_ETH_VLAN_EXTEND_MASK); > + } > + } > + > ret =3D rte_eth_switch_domain_free(pf->switch_domain_id); > if (ret) > PMD_INIT_LOG(WARNING, "failed to free switch domain: %d", > ret); > @@ -3909,6 +3922,7 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev, > struct i40e_pf *pf =3D > I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); > int qinq =3D dev->data->dev_conf.rxmode.offloads & > RTE_ETH_RX_OFFLOAD_VLAN_EXTEND; > + u16 sw_flags =3D 0, valid_flags =3D 0; > int ret =3D 0; > > if ((vlan_type !=3D RTE_ETH_VLAN_TYPE_INNER && > @@ -3927,15 +3941,32 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev, > /* 802.1ad frames ability is added in NVM API 1.7*/ > if (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) { > if (qinq) { > + if (pf->fw8_3gt) { > + sw_flags =3D > I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN; > + valid_flags =3D > I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN; > + } > if (vlan_type =3D=3D RTE_ETH_VLAN_TYPE_OUTER) > hw->first_tag =3D rte_cpu_to_le_16(tpid); > else if (vlan_type =3D=3D RTE_ETH_VLAN_TYPE_INNER= ) > hw->second_tag =3D rte_cpu_to_le_16(tpid)= ; > } else { > - if (vlan_type =3D=3D RTE_ETH_VLAN_TYPE_OUTER) > - hw->second_tag =3D rte_cpu_to_le_16(tpid)= ; > + /* > + * If tpid is equal to 0x88A8, indicates that the > + * disable double VLAN operation is in progress. > + * Need set switch configuration back to default. > + */ > + if (pf->fw8_3gt && tpid =3D=3D RTE_ETHER_TYPE_QIN= Q) { > + sw_flags =3D 0; > + valid_flags =3D > I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN; > + if (vlan_type =3D=3D RTE_ETH_VLAN_TYPE_OU= TER) > + hw->first_tag =3D > rte_cpu_to_le_16(tpid); > + } else { > + if (vlan_type =3D=3D RTE_ETH_VLAN_TYPE_OU= TER) > + hw->second_tag =3D > rte_cpu_to_le_16(tpid); > + } > } > - ret =3D i40e_aq_set_switch_config(hw, 0, 0, 0, NULL); > + ret =3D i40e_aq_set_switch_config(hw, sw_flags, > + valid_flags, 0, NULL); > if (ret !=3D I40E_SUCCESS) { > PMD_DRV_LOG(ERR, > "Set switch config failed aq_err: %d"= , > @@ -3987,8 +4018,13 @@ static int > i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask) > { > struct i40e_pf *pf =3D > I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); > + struct i40e_mac_filter_info *mac_filter; > struct i40e_vsi *vsi =3D pf->main_vsi; > struct rte_eth_rxmode *rxmode; > + struct i40e_mac_filter *f; > + int i, num; > + void *temp; > + int ret; > > rxmode =3D &dev->data->dev_conf.rxmode; > if (mask & RTE_ETH_VLAN_FILTER_MASK) { > @@ -4007,6 +4043,33 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int > mask) > } > > if (mask & RTE_ETH_VLAN_EXTEND_MASK) { > + i =3D 0; > + num =3D vsi->mac_num; > + mac_filter =3D rte_zmalloc("mac_filter_info_data", > + num * sizeof(*mac_filter), 0); > + if (mac_filter =3D=3D NULL) { > + PMD_DRV_LOG(ERR, "failed to allocate memory"); > + return I40E_ERR_NO_MEMORY; > + } > + > + /* > + * Outer VLAN processing is supported after firmware v8.4= , > kernel driver > + * also change the default behavior to support this > feature. To align with > + * kernel driver, set switch config in > 'i40e_vlan_tpie_set' to support for > + * outer VLAN processing. But it is forbidden for firmwar= e > to change the > + * Inner/Outer VLAN configuration while there are MAC/VLA= N > filters in the > + * switch table. Therefore, we need to clear the MAC tabl= e > before setting > + * config, and then restore the MAC table after setting. > This feature is > + * recommended to be used in firmware v8.6. > + */ > + /* Remove all existing mac */ > + RTE_TAILQ_FOREACH_SAFE(f, &vsi->mac_list, next, temp) { > + mac_filter[i] =3D f->mac_info; > + ret =3D i40e_vsi_delete_mac(vsi, > &f->mac_info.mac_addr); > + if (ret) > + PMD_DRV_LOG(ERR, "i40e vsi delete mac > fail."); > + i++; > + } > if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND) { > i40e_vsi_config_double_vlan(vsi, TRUE); > /* Set global registers with default ethertype. *= / > @@ -4014,9 +4077,19 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int > mask) > RTE_ETHER_TYPE_VLAN); > i40e_vlan_tpid_set(dev, RTE_ETH_VLAN_TYPE_INNER, > RTE_ETHER_TYPE_VLAN); > - } > - else > + } else { > + if (pf->fw8_3gt) > + i40e_vlan_tpid_set(dev, > RTE_ETH_VLAN_TYPE_OUTER, > + RTE_ETHER_TYPE_QINQ); > i40e_vsi_config_double_vlan(vsi, FALSE); > + } > + /* Restore all mac */ > + for (i =3D 0; i < num; i++) { > + ret =3D i40e_vsi_add_mac(vsi, &mac_filter[i]); > + if (ret) > + PMD_DRV_LOG(ERR, "i40e vsi add mac fail."= ); > + } > + rte_free(mac_filter); > } > > if (mask & RTE_ETH_QINQ_STRIP_MASK) { > @@ -4846,6 +4919,17 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev) > return -EINVAL; > } > > + /** > + * Enable outer VLAN processing if firmware version is greater > + * than v8.3 > + */ > + if (hw->aq.fw_maj_ver > 8 || > + (hw->aq.fw_maj_ver =3D=3D 8 && hw->aq.fw_min_ver > 3)) { > + pf->fw8_3gt =3D true; > + } else { > + pf->fw8_3gt =3D false; > + } > + > return 0; > } > > diff --git a/drivers/net/i40e/i40e_ethdev.h > b/drivers/net/i40e/i40e_ethdev.h > index a1ebdc093c..fe943a45ff 100644 > --- a/drivers/net/i40e/i40e_ethdev.h > +++ b/drivers/net/i40e/i40e_ethdev.h > @@ -1188,6 +1188,9 @@ struct i40e_pf { > /* Switch Domain Id */ > uint16_t switch_domain_id; > > + /* When firmware > 8.3, the enable flag for outer VLAN processing > */ > + bool fw8_3gt; > + > struct i40e_vf_msg_cfg vf_msg_cfg; > uint64_t prev_rx_bytes; > uint64_t prev_tx_bytes; > -- > 2.34.1 > > --000000000000f7108905e1558f77 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Thanks for the information on 8.4.=C2=A0 Unfortunately mos= t of NICs are from Dell so will need to push them to produce another update= package and would prefer to wait till we know what is required to fix our = issue.

I loaded 8.6 and 8.7 on one of our test hosts and our i= ssue still exists so will continue pushing the open case we have with Intel= as that is where we still think this lies.

= Cheers,
Ben

On Sun, Jun 12, 2022 at 10:14 PM Liu, KevinX <= ;kevinx.liu@intel= .com> wrote:

Hi, Ben

This patch can only take effect after firmware v8.6.= It cannot be used on firmware v8.4 and v8.5. The reason is that the firmwa= re team gave a clear reply that there are many related bugs in firmware v8.= 4 and v8.5, and they were fixed in firmware v8.6. The firmware team recommends using v8.6.

=C2=A0

Regards

Kevin

=C2=A0

From: Ben Magistro <koncept1@gmail.com>
Sent: 2022=E5=B9=B46=E6=9C=8810= =E6=97=A5 22:27
To: Liu, KevinX <kevinx.liu@intel.com>
Cc: dev@dpdk.org; Zhang, Yuying <yuying.zhang@intel.com>; Xing, Beilei <beilei.xing@intel.com>; Yang= , SteveX <ste= vex.yang@intel.com>; Zhang, RobinX <robinx.zhang@intel.com>
Subject: Re: [PATCH v7] net/i40e: add outer VLAN processing

=C2=A0

I'm trying to understand if this change is at al= l related to an issue we are experiencing with newer firmwares (https://mails.dpdk.org/archives/dev/2022-April/238621.html) that happened to start with 8.4 and affected qinq offload processing.=C2= =A0 I can say loading this patch and running testpmd does not seem to have = any effect on the issue we are experiencing.

=C2=A0

Side note, there is also a minor typo in the=C2=A0co= mment block "i40e_vlan_tpie_set" vs "i40e_vlan_tpid_set"= ;.

=C2=A0

Thanks

=C2=A0

On Fri, Jun 10, 2022 at 4:30 AM Kevin Liu <kevinx.liu@intel.com> wrote:

From: Robin Zhang <<= a href=3D"mailto:robinx.zhang@intel.com" target=3D"_blank">robinx.zhang@int= el.com>

Outer VLAN processing is supported after firmware v8.4, kernel driver
also change the default behavior to support this feature. To align with
kernel driver, add support for outer VLAN processing in DPDK.

But it is forbidden for firmware to change the Inner/Outer VLAN
configuration while there are MAC/VLAN filters in the switch table.
Therefore, we need to clear the MAC table before setting config,
and then restore the MAC table after setting.

This will not impact on an old firmware.

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Signed-off-by: Kevin Liu <kevinx.liu@intel.com>
---
=C2=A0drivers/net/i40e/i40e_ethdev.c | 94 ++++++++++++++++++++++++++++++++-= -
=C2=A0drivers/net/i40e/i40e_ethdev.h |=C2=A0 3 ++
=C2=A02 files changed, 92 insertions(+), 5 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.= c
index 755786dc10..4cae163cb9 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -2575,6 +2575,7 @@ i40e_dev_close(struct rte_eth_dev *dev)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct i40e_hw *hw =3D I40E_DEV_PRIVATE_TO_HW(d= ev->data->dev_private);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct rte_pci_device *pci_dev =3D RTE_ETH_DEV_= TO_PCI(dev);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct rte_intr_handle *intr_handle =3D pci_dev= ->intr_handle;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0struct rte_eth_rxmode *rxmode =3D &dev->= data->dev_conf.rxmode;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct i40e_filter_control_settings settings; =C2=A0 =C2=A0 =C2=A0 =C2=A0 struct rte_flow *p_flow;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint32_t reg;
@@ -2587,6 +2588,18 @@ i40e_dev_close(struct rte_eth_dev *dev)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (rte_eal_process_type() !=3D RTE_PROC_PRIMAR= Y)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;

+=C2=A0 =C2=A0 =C2=A0 =C2=A0/*
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * It is a workaround, if the double VLAN is di= sabled when
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * the program exits, an abnormal error will oc= cur on the
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * NIC. Need to enable double VLAN when dev is = closed.
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0if (pf->fw8_3gt) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (!(rxmode->of= floads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0rxmode->offloads |=3D RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0i40e_vlan_offload_set(dev, RTE_ETH_VLAN_EXTEND_MASK);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+=C2=A0 =C2=A0 =C2=A0 =C2=A0}
+
=C2=A0 =C2=A0 =C2=A0 =C2=A0 ret =3D rte_eth_switch_domain_free(pf->switc= h_domain_id);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (ret)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 PMD_INIT_LOG(WARNIN= G, "failed to free switch domain: %d", ret);
@@ -3909,6 +3922,7 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct i40e_pf *pf =3D I40E_DEV_PRIVATE_TO_PF(d= ev->data->dev_private);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 int qinq =3D dev->data->dev_conf.rxmode.o= ffloads &
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0RTE_ET= H_RX_OFFLOAD_VLAN_EXTEND;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0u16 sw_flags =3D 0, valid_flags =3D 0;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 int ret =3D 0;

=C2=A0 =C2=A0 =C2=A0 =C2=A0 if ((vlan_type !=3D RTE_ETH_VLAN_TYPE_INNER &am= p;&
@@ -3927,15 +3941,32 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* 802.1ad frames ability is added in NVM API 1= .7*/
=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (hw->flags & I40E_HW_FLAG_802_1AD_CAP= ABLE) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (qinq) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0if (pf->fw8_3gt) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0sw_flags =3D I40E_AQ_SET_SWITCH_CFG_O= UTER_VLAN;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0valid_flags =3D I40E_AQ_SET_SWITCH_CF= G_OUTER_VLAN;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0}
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 if (vlan_type =3D=3D RTE_ETH_VLAN_TYPE_OUTER)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 hw->first_tag =3D rte_cpu_to_le_1= 6(tpid);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 else if (vlan_type =3D=3D RTE_ETH_VLAN_TYPE_INNER)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 hw->second_tag =3D rte_cpu_to_le_= 16(tpid);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 } else {
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0if (vlan_type =3D=3D RTE_ETH_VLAN_TYPE_OUTER)
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0hw->second_tag =3D rte_cpu_to_le_1= 6(tpid);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0/*
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 * If tpid is equal to 0x88A8, indicates that the
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 * disable double VLAN operation is in progress.
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 * Need set switch configuration back to default.
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0if (pf->fw8_3gt && tpid =3D=3D RTE_ETHER_TYPE_QINQ) {<= br> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0sw_flags =3D 0;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0valid_flags =3D I40E_AQ_SET_SWITCH_CF= G_OUTER_VLAN;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (vlan_type =3D=3D RTE_ETH_VLAN_TYP= E_OUTER)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0hw->fi= rst_tag =3D rte_cpu_to_le_16(tpid);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0} else {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (vlan_type =3D=3D RTE_ETH_VLAN_TYP= E_OUTER)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0hw->se= cond_tag =3D rte_cpu_to_le_16(tpid);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0}
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0ret =3D i40e_aq_set= _switch_config(hw, 0, 0, 0, NULL);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0ret =3D i40e_aq_set= _switch_config(hw, sw_flags,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0valid_flags, 0, NULL);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (ret !=3D I40E_S= UCCESS) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 PMD_DRV_LOG(ERR,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 "Set switch confi= g failed aq_err: %d",
@@ -3987,8 +4018,13 @@ static int
=C2=A0i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask)
=C2=A0{
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct i40e_pf *pf =3D I40E_DEV_PRIVATE_TO_PF(d= ev->data->dev_private);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0struct i40e_mac_filter_info *mac_filter;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct i40e_vsi *vsi =3D pf->main_vsi;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct rte_eth_rxmode *rxmode;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0struct i40e_mac_filter *f;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0int i, num;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0void *temp;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0int ret;

=C2=A0 =C2=A0 =C2=A0 =C2=A0 rxmode =3D &dev->data->dev_conf.rxmod= e;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (mask & RTE_ETH_VLAN_FILTER_MASK) {
@@ -4007,6 +4043,33 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int m= ask)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 }

=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (mask & RTE_ETH_VLAN_EXTEND_MASK) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0i =3D 0;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0num =3D vsi->mac= _num;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0mac_filter =3D rte_= zmalloc("mac_filter_info_data",
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 num * sizeof(*mac_filter), 0);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0if (mac_filter =3D= =3D NULL) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0PMD_DRV_LOG(ERR, "failed to allocate memory");
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0return I40E_ERR_NO_MEMORY;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/*
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * Outer VLAN proce= ssing is supported after firmware v8.4, kernel driver
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * also change the = default behavior to support this feature. To align with
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * kernel driver, s= et switch config in 'i40e_vlan_tpie_set' to support for
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * outer VLAN proce= ssing. But it is forbidden for firmware to change the
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * Inner/Outer VLAN= configuration while there are MAC/VLAN filters in the
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * switch table. Th= erefore, we need to clear the MAC table before setting
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * config, and then= restore the MAC table after setting. This feature is
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 * recommended to b= e used in firmware v8.6.
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/* Remove all exist= ing mac */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0RTE_TAILQ_FOREACH_S= AFE(f, &vsi->mac_list, next, temp) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0mac_filter[i] =3D f->mac_info;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0ret =3D i40e_vsi_delete_mac(vsi, &f->mac_info.mac_addr); +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0if (ret)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0PMD_DRV_LOG(ERR, "i40e vsi delet= e mac fail.");
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0i++;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (rxmode->offl= oads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND) {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 i40e_vsi_config_double_vlan(vsi, TRUE);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 /* Set global registers with default ethertype. */
@@ -4014,9 +4077,19 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int m= ask)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0RTE_ETHER_TYPE_VLAN);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 i40e_vlan_tpid_set(dev, RTE_ETH_VLAN_TYPE_INNER,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0RTE_ETHER_TYPE_VLAN);
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0else
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0} else {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0if (pf->fw8_3gt)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0i40e_vlan_tpid_set(dev, RTE_ETH_VLAN_= TYPE_OUTER,
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 R= TE_ETHER_TYPE_QINQ);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 i40e_vsi_config_double_vlan(vsi, FALSE);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/* Restore all mac = */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0for (i =3D 0; i <= ; num; i++) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0ret =3D i40e_vsi_add_mac(vsi, &mac_filter[i]);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0if (ret)
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0PMD_DRV_LOG(ERR, "i40e vsi add m= ac fail.");
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0rte_free(mac_filter= );
=C2=A0 =C2=A0 =C2=A0 =C2=A0 }

=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (mask & RTE_ETH_QINQ_STRIP_MASK) {
@@ -4846,6 +4919,17 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return -EINVAL;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 }

+=C2=A0 =C2=A0 =C2=A0 =C2=A0/**
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * Enable outer VLAN processing if firmware ver= sion is greater
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 * than v8.3
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0if (hw->aq.fw_maj_ver > 8 ||
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(hw->aq.fw_maj_ver =3D=3D 8 &a= mp;& hw->aq.fw_min_ver > 3)) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0pf->fw8_3gt =3D = true;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0} else {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0pf->fw8_3gt =3D = false;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0}
+
=C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;
=C2=A0}

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.= h
index a1ebdc093c..fe943a45ff 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -1188,6 +1188,9 @@ struct i40e_pf {
=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Switch Domain Id */
=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint16_t switch_domain_id;

+=C2=A0 =C2=A0 =C2=A0 =C2=A0/* When firmware > 8.3, the enable flag for = outer VLAN processing */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0bool fw8_3gt;
+
=C2=A0 =C2=A0 =C2=A0 =C2=A0 struct i40e_vf_msg_cfg vf_msg_cfg;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint64_t prev_rx_bytes;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint64_t prev_tx_bytes;
--
2.34.1

--000000000000f7108905e1558f77--