From: Jerin Jacob <jerinjacobk@gmail.com>
To: Kiran Kumar K <kirankumark@marvell.com>
Cc: Jerin Jacob <jerinj@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
John McNamara <john.mcnamara@intel.com>,
Marko Kovacevic <marko.kovacevic@intel.com>,
dpdk-dev <dev@dpdk.org>, Ferruh Yigit <ferruh.yigit@intel.com>
Subject: Re: [dpdk-dev] [PATCH v3] net/octeontx2: add tx desc status dev ops
Date: Thu, 3 Oct 2019 21:26:26 +0530 [thread overview]
Message-ID: <CALBAE1M=UzZ9EAF4wZ+5NJnpVtQRupSXkaQY_vSULNTdTLqMjA@mail.gmail.com> (raw)
In-Reply-To: <20190906124302.14534-1-kirankumark@marvell.com>
On Fri, Sep 6, 2019 at 6:13 PM <kirankumark@marvell.com> wrote:
>
> From: Kiran Kumar K <kirankumark@marvell.com>
>
> Adding support for tx descriptor status dev ops for octeontx2.
>
> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
# Fixed check-git-log.sh issue(Subject changed to net/octeontx2: add
Tx descriptor status op)
# Tx descriptor status = Y update was missing in
doc/guides/nics/features/octeontx2_vec.ini and
doc/guides/nics/features/octeontx2_vf.ini
Acked-by: Jerin Jacob <jerinj@marvell.com>
Fixed above and Applied to dpdk-next-net-mrvl/master. Thanks
> ---
> V3 Changes:
> * Added version info in subject
>
> V2 Changes:
> * Fixed check for num of tx desc
>
> doc/guides/nics/features/octeontx2.ini | 1 +
> drivers/net/octeontx2/otx2_ethdev.c | 1 +
> drivers/net/octeontx2/otx2_ethdev.h | 1 +
> drivers/net/octeontx2/otx2_ethdev_ops.c | 38 ++++++++++++++++++++++++-
> 4 files changed, 40 insertions(+), 1 deletion(-)
>
> diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini
> index 66952328b..b89959994 100644
> --- a/doc/guides/nics/features/octeontx2.ini
> +++ b/doc/guides/nics/features/octeontx2.ini
> @@ -39,6 +39,7 @@ Packet type parsing = Y
> Timesync = Y
> Timestamp offload = Y
> Rx descriptor status = Y
> +Tx descriptor status = Y
> Basic stats = Y
> Stats per queue = Y
> Extended stats = Y
> diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
> index b84128fef..696c85cb8 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.c
> +++ b/drivers/net/octeontx2/otx2_ethdev.c
> @@ -1646,6 +1646,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
> .rx_queue_count = otx2_nix_rx_queue_count,
> .rx_descriptor_done = otx2_nix_rx_descriptor_done,
> .rx_descriptor_status = otx2_nix_rx_descriptor_status,
> + .tx_descriptor_status = otx2_nix_tx_descriptor_status,
> .tx_done_cleanup = otx2_nix_tx_done_cleanup,
> .pool_ops_supported = otx2_nix_pool_ops_supported,
> .filter_ctrl = otx2_nix_dev_filter_ctrl,
> diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
> index 7b15d6bc8..1c660cb1e 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.h
> +++ b/drivers/net/octeontx2/otx2_ethdev.h
> @@ -377,6 +377,7 @@ uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx);
> int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);
> int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);
> int otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset);
> +int otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset);
>
> void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en);
> void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev);
> diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
> index 7c6532b6f..ab07e4bc0 100644
> --- a/drivers/net/octeontx2/otx2_ethdev_ops.c
> +++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
> @@ -274,7 +274,7 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset)
> struct otx2_eth_rxq *rxq = rx_queue;
> uint32_t head, tail;
>
> - if (rxq->qlen >= offset)
> + if (rxq->qlen <= offset)
> return -EINVAL;
>
> nix_rx_head_tail_get(otx2_eth_pmd_priv(rxq->eth_dev),
> @@ -286,6 +286,42 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset)
> return RTE_ETH_RX_DESC_AVAIL;
> }
>
> +static void
> +nix_tx_head_tail_get(struct otx2_eth_dev *dev,
> + uint32_t *head, uint32_t *tail, uint16_t queue_idx)
> +{
> + uint64_t reg, val;
> +
> + if (head == NULL || tail == NULL)
> + return;
> +
> + reg = (((uint64_t)queue_idx) << 32);
> + val = otx2_atomic64_add_nosync(reg, (int64_t *)
> + (dev->base + NIX_LF_SQ_OP_STATUS));
> + if (val & OP_ERR)
> + val = 0;
> +
> + *tail = (uint32_t)((val >> 28) & 0x3F);
> + *head = (uint32_t)((val >> 20) & 0x3F);
> +}
> +
> +int
> +otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset)
> +{
> + struct otx2_eth_txq *txq = tx_queue;
> + uint32_t head, tail;
> +
> + if (txq->qconf.nb_desc <= offset)
> + return -EINVAL;
> +
> + nix_tx_head_tail_get(txq->dev, &head, &tail, txq->sq);
> +
> + if (nix_offset_has_packet(head, tail, offset))
> + return RTE_ETH_TX_DESC_DONE;
> + else
> + return RTE_ETH_TX_DESC_FULL;
> +}
> +
> /* It is a NOP for octeontx2 as HW frees the buffer on xmit */
> int
> otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)
> --
> 2.17.1
>
prev parent reply other threads:[~2019-10-03 15:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 3:23 [dpdk-dev] [PATCH] " kirankumark
2019-09-06 5:40 ` kirankumark
2019-09-06 12:43 ` [dpdk-dev] [PATCH v3] " kirankumark
2019-10-03 15:56 ` Jerin Jacob [this message]
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