From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 35B33A2F18 for ; Thu, 3 Oct 2019 17:56:39 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A6CBF1C113; Thu, 3 Oct 2019 17:56:38 +0200 (CEST) Received: from mail-io1-f67.google.com (mail-io1-f67.google.com [209.85.166.67]) by dpdk.org (Postfix) with ESMTP id 33BD21C10F for ; Thu, 3 Oct 2019 17:56:38 +0200 (CEST) Received: by mail-io1-f67.google.com with SMTP id c6so6625326ioo.13 for ; Thu, 03 Oct 2019 08:56:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=NfsfDe6r8nGtBKJPzb11LgB5qmLcM8pxd3q+GL5mLb8=; b=cLYiNQ1vhc7kjRGO2U7sjeORnHqoO62yF3BPtKNjtj3TgKDZJRYZiRdds+jNPsscI/ BFedjSLkXiHY5v09qABi+LIyJGToTD0eaZpLjzL71PKg4rWFuiI0CKxZqSjXb4UMUKeX p1DgdZuNYYTy0UZAO/IXACz14F1vTdhO23Ou/zyesPFTSe+sGPHF9flQbkdtqI+kZTV/ piB2CalQqPZP0Af5vLKLF1DpmuEhq1fvTGgVf5zDL4f16Aya7HOMebPS4gcF/1N+yEG1 V+yr/TbhVGGUdTmXSyrVjo1bDvnKGFZ2icQHmAUS26bAcbjsklHWwpUjI/IGDq7lcub8 mt6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=NfsfDe6r8nGtBKJPzb11LgB5qmLcM8pxd3q+GL5mLb8=; b=gpMl3/xpTuZLnU4jQxGkDAR3MaqlkC0S7O6F/KD6LJF3Z4Y7soB16xV1WvYuLzH1UY X6v4NqeJoAWOyweodh+6wgskk8ZoCBCySHtqr8FRE4iVJYc4/tPqPxvvEI4ummzptUQk OiZFwk6+1aI6dj9AI7+MJ19qhLrK2SDjZjSzT0QdpQgBHH78pQTeAa+5gBKcCSbV1AfW rZk6McRhYLF1U8bk+ppGyixvnuWfRCjTqJuOzPGqvN2mnXfqzfJsejFH4ScLuMWE+7yZ 9W2qsd+Fx7xyJZ7ruqMD95HyFmQxH0Vx+lnWD71Nkjihsyalo3WLlOW3wDRnnnbQTBCV MhDQ== X-Gm-Message-State: APjAAAXg0GunP8gguElTwQzQOP3eKHh001fpxNd8JOCQ4YweFFoWHWZy f03Tz9GfrhMi8NuPlzmjJx7fjBROHUvhU7Vl8Ps= X-Google-Smtp-Source: APXvYqzSfit8EXS+GNzZTqQubpljkOmK9az2DPfrUTUsl+0uKBkbdCwRlDrSm1oYuVxPRXLr66uY5IMhik7yvOO1lKY= X-Received: by 2002:a92:1559:: with SMTP id v86mr10948603ilk.130.1570118197282; Thu, 03 Oct 2019 08:56:37 -0700 (PDT) MIME-Version: 1.0 References: <20190906054050.13214-1-kirankumark@marvell.com> <20190906124302.14534-1-kirankumark@marvell.com> In-Reply-To: <20190906124302.14534-1-kirankumark@marvell.com> From: Jerin Jacob Date: Thu, 3 Oct 2019 21:26:26 +0530 Message-ID: To: Kiran Kumar K Cc: Jerin Jacob , Nithin Dabilpuram , John McNamara , Marko Kovacevic , dpdk-dev , Ferruh Yigit Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v3] net/octeontx2: add tx desc status dev ops X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Sep 6, 2019 at 6:13 PM wrote: > > From: Kiran Kumar K > > Adding support for tx descriptor status dev ops for octeontx2. > > Signed-off-by: Kiran Kumar K # Fixed check-git-log.sh issue(Subject changed to net/octeontx2: add Tx descriptor status op) # Tx descriptor status = Y update was missing in doc/guides/nics/features/octeontx2_vec.ini and doc/guides/nics/features/octeontx2_vf.ini Acked-by: Jerin Jacob Fixed above and Applied to dpdk-next-net-mrvl/master. Thanks > --- > V3 Changes: > * Added version info in subject > > V2 Changes: > * Fixed check for num of tx desc > > doc/guides/nics/features/octeontx2.ini | 1 + > drivers/net/octeontx2/otx2_ethdev.c | 1 + > drivers/net/octeontx2/otx2_ethdev.h | 1 + > drivers/net/octeontx2/otx2_ethdev_ops.c | 38 ++++++++++++++++++++++++- > 4 files changed, 40 insertions(+), 1 deletion(-) > > diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini > index 66952328b..b89959994 100644 > --- a/doc/guides/nics/features/octeontx2.ini > +++ b/doc/guides/nics/features/octeontx2.ini > @@ -39,6 +39,7 @@ Packet type parsing = Y > Timesync = Y > Timestamp offload = Y > Rx descriptor status = Y > +Tx descriptor status = Y > Basic stats = Y > Stats per queue = Y > Extended stats = Y > diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c > index b84128fef..696c85cb8 100644 > --- a/drivers/net/octeontx2/otx2_ethdev.c > +++ b/drivers/net/octeontx2/otx2_ethdev.c > @@ -1646,6 +1646,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = { > .rx_queue_count = otx2_nix_rx_queue_count, > .rx_descriptor_done = otx2_nix_rx_descriptor_done, > .rx_descriptor_status = otx2_nix_rx_descriptor_status, > + .tx_descriptor_status = otx2_nix_tx_descriptor_status, > .tx_done_cleanup = otx2_nix_tx_done_cleanup, > .pool_ops_supported = otx2_nix_pool_ops_supported, > .filter_ctrl = otx2_nix_dev_filter_ctrl, > diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h > index 7b15d6bc8..1c660cb1e 100644 > --- a/drivers/net/octeontx2/otx2_ethdev.h > +++ b/drivers/net/octeontx2/otx2_ethdev.h > @@ -377,6 +377,7 @@ uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx); > int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt); > int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset); > int otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset); > +int otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset); > > void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en); > void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev); > diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c > index 7c6532b6f..ab07e4bc0 100644 > --- a/drivers/net/octeontx2/otx2_ethdev_ops.c > +++ b/drivers/net/octeontx2/otx2_ethdev_ops.c > @@ -274,7 +274,7 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset) > struct otx2_eth_rxq *rxq = rx_queue; > uint32_t head, tail; > > - if (rxq->qlen >= offset) > + if (rxq->qlen <= offset) > return -EINVAL; > > nix_rx_head_tail_get(otx2_eth_pmd_priv(rxq->eth_dev), > @@ -286,6 +286,42 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset) > return RTE_ETH_RX_DESC_AVAIL; > } > > +static void > +nix_tx_head_tail_get(struct otx2_eth_dev *dev, > + uint32_t *head, uint32_t *tail, uint16_t queue_idx) > +{ > + uint64_t reg, val; > + > + if (head == NULL || tail == NULL) > + return; > + > + reg = (((uint64_t)queue_idx) << 32); > + val = otx2_atomic64_add_nosync(reg, (int64_t *) > + (dev->base + NIX_LF_SQ_OP_STATUS)); > + if (val & OP_ERR) > + val = 0; > + > + *tail = (uint32_t)((val >> 28) & 0x3F); > + *head = (uint32_t)((val >> 20) & 0x3F); > +} > + > +int > +otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset) > +{ > + struct otx2_eth_txq *txq = tx_queue; > + uint32_t head, tail; > + > + if (txq->qconf.nb_desc <= offset) > + return -EINVAL; > + > + nix_tx_head_tail_get(txq->dev, &head, &tail, txq->sq); > + > + if (nix_offset_has_packet(head, tail, offset)) > + return RTE_ETH_TX_DESC_DONE; > + else > + return RTE_ETH_TX_DESC_FULL; > +} > + > /* It is a NOP for octeontx2 as HW frees the buffer on xmit */ > int > otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt) > -- > 2.17.1 >