From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 37095A2EFC for ; Tue, 15 Oct 2019 11:43:48 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C258B1EB2E; Tue, 15 Oct 2019 11:43:46 +0200 (CEST) Received: from mail-io1-f68.google.com (mail-io1-f68.google.com [209.85.166.68]) by dpdk.org (Postfix) with ESMTP id 591AA1EB2B; Tue, 15 Oct 2019 11:43:45 +0200 (CEST) Received: by mail-io1-f68.google.com with SMTP id n26so44348433ioj.8; Tue, 15 Oct 2019 02:43:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=hQYW752KNvEPgc2iL9BxEuxXpNEiFLle/OwvsZp2hPc=; b=cWIJiuZZX38eXUaUpE/OCNro/4f8rxls1e2r3zHTGqFfcF6Wr/bwU0OuysdMUi0Ws4 NexU64c3JsdXg3jV7LoabIHc8TRZUPhS6/9Qs68sWskKjFhSYYpj6EXVN5PSnOuap+zB gXaF7iFnfWYcixiyf7e4MzsEtgEBxQLuauRNhwy4Z0OPHLE4CkXtyKUsWCoDzd+UNwfp 9612WMpQuQE1Hu7Gi5Muz3PTpXTVTH/ix5EpaoAZCNPNEV33YVPV9n43ccjpYXFNC5qV 4S66qHdG3Qy0SE86PV529HRRgP7hp7hh+sOnfrzFFw5MA6a/sdDTbTw0R7itfW01ZbvR rPgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=hQYW752KNvEPgc2iL9BxEuxXpNEiFLle/OwvsZp2hPc=; b=dmcAAtiYdpughgjzC2axFksA2XmoY4tohMzf7tlJqt/9TtSHJK6VyO5d6cxAaSUhJr MsFC803bvPX1g21DMJyuPnJyacA+/+0ZzjrcTFdKD7eYc2ZQSbQ9xOS2j8Ls9y4nbL6f i5JPwMRYs+d0PncVYHPkPZQJ/elxLMJ1AbSKEKo9PqueN6/FVpBgKsQTgYnH0gj0C+gH Fp15KtQa3THNotbSbzGwpusJGXFn3oSv6CA/RD8c8peZhNzLJ1kjq2HbtrShWBHRrJX9 yQhN6h3lsWtYaAQ3q8/RqwcXAIE8h8GXKAz3VcuAn6Ydj1nYTcWemG81P92zGvgBFogs C3jg== X-Gm-Message-State: APjAAAXKw4EmwIHFbaX0lISvuAzI+PcOmvdbXxczxCF4IsuDKTLRQV7Q FRVaN7gT8yanYzJPjKeg9tCup5ziOKHUubB8sD4jga1W+aWbuQ== X-Google-Smtp-Source: APXvYqwIzftrxnVEPQ19t0h8h34JC44BMDBoLY9ZtG5oGIRQIorKBLD+IrleRxmA3iejBjZXIK3RsnQlgU2lnWZdrfc= X-Received: by 2002:a92:2c03:: with SMTP id t3mr5079099ile.271.1571132624365; Tue, 15 Oct 2019 02:43:44 -0700 (PDT) MIME-Version: 1.0 References: <20191015070214.93403-1-asomalap@amd.com> In-Reply-To: From: Jerin Jacob Date: Tue, 15 Oct 2019 15:13:33 +0530 Message-ID: To: "Somalapuram, Amaranath" Cc: "dev@dpdk.org" , "stable@dpdk.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [dpdk-dev] [PATCH v1 5/6] crypto/ccp: enable IOMMU for CCP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Oct 15, 2019 at 2:05 PM Somalapuram, Amaranath wrote: > > Problem statement: As of now vdev device do not support IOMMU. > vdev device used to custom solution, even for software drives like openss= l uses vdev. I spend some time going through the driver. #The ideal architecture of this driver would have been to introduce a bus driver(see drivers/bus/ifpga/) which does all the PCI probes(drivers/crypto/ccp/rte_ccp_pmd.c and drivers/crypto/ccp/ccp_pci.c) and arrange the devices on the bus scan and enable "non bus" specific driver crypto driver. So that no pci probe etc in crypto driver. # On the upside, You DONT need to give vdev=3D on eal arguments, on AMD machines it can probe the crypto devices automatically and probe the crypto driver # I dont think, it is specific to vdev IOMMU support, If would have been PCI/Any bus driver, you would have similar changes. Right? # Major portion of this patch does following + if (iommu_mode =3D=3D 2) + pst.src_addr =3D (phys_addr_t)rte_mem_virt2iova( + (void *) lsb_buf); + else + pst.src_addr =3D (phys_addr_t)rte_mem_virt2phy( + (void *) lsb_buf); + Since the following check already present common code, Do we need the above check, just calling rte_mem_virt2iova() is enough. Right? rte_iova_t rte_mem_virt2iova(const void *virtaddr) { if (rte_eal_iova_mode() =3D=3D RTE_IOVA_VA) return (uintptr_t)virtaddr; return rte_mem_virt2phy(virtaddr); } > I feel its not advisable to put iommu in vdev. > moving the changes to vdev will effect rest of the vdev drives. > That will be big efforts. Every vdev drivers has their own implementation= . Need better design to move it to vdev or common place. > > Regards, > S.Amarnath > > -----Original Message----- > From: Jerin Jacob > Sent: Tuesday, October 15, 2019 1:47 PM > To: Somalapuram, Amaranath > Cc: dev@dpdk.org; stable@dpdk.org > Subject: Re: [dpdk-dev] [PATCH v1 5/6] crypto/ccp: enable IOMMU for CCP > > [CAUTION: External Email] > > On Tue, Oct 15, 2019 at 12:32 PM wrote: > > > > From: Amaranath Somalapuram > > > > CCP use vdev framework, and vdev framework don=E2=80=99t support IOMMU. > > Adding custom IOMMU support for AMD CCP drives. > > Cc: stable@dpdk.org > > > > + if (iommu_mode =3D=3D 2) > > + pci->kdrv =3D RTE_KDRV_VFIO; > > + else if (iommu_mode =3D=3D 0) > > + pci->kdrv =3D RTE_KDRV_IGB_UIO; > > + else if (iommu_mode =3D=3D 1) > > + pci->kdrv =3D RTE_KDRV_UIO_GENERIC; > > The crypto driver should not have iommu mode-specific handling. > I am not sure about the problem statement. If the problem is, iommu suppo= rt for PCI based vdev device then move the solution to common layer so that= everyone can use it. If not, please share the problem statement