From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5F4C3A00C2; Fri, 6 Jan 2023 09:59:19 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4EA99406A2; Fri, 6 Jan 2023 09:59:19 +0100 (CET) Received: from mail-vs1-f49.google.com (mail-vs1-f49.google.com [209.85.217.49]) by mails.dpdk.org (Postfix) with ESMTP id 77F914021F for ; Fri, 6 Jan 2023 09:59:17 +0100 (CET) Received: by mail-vs1-f49.google.com with SMTP id l184so921474vsc.0 for ; Fri, 06 Jan 2023 00:59:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=7tK0CkjMK0sztQjuzaRCEClJqMjzdIGgAw/zrJzMZHc=; b=bCWLTc7haqzMdMGWchAjvyb9biBHbHI76QP2KeXEkL3I3UPC42ayMBe0rUfFKGuT/m QKVYgPiNmWLEPbUKTxv/uWlvECTGTESscfsAXhqGZwQ4fsmQiRpoLg94L7tYM11vzFTo WMEP6kmZCWV2BwT5l/TeE+ePnHCEZHG0ju0ruafXwL7i4ZgFyhNNtwcWH62HACQjzcDr 0Ecb9jg0u9ggvq3gkG5WqfavlaGktBciuTol8tVc2gEO9lvJdbUj5mAPXatvJvypS6C1 H3WYXlgU6zpF4ZA53Aj2pC+fj6HyC1pINpA3QAemM7ceMH46gA3dRZs5IIa22eab2/+o eXFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=7tK0CkjMK0sztQjuzaRCEClJqMjzdIGgAw/zrJzMZHc=; b=bMJFAVYYzgsErD7LjWURenWP4LGH2LVnLgvwLdooTp3NoD2r6SpSVV9/7bIUGnQmHb QiizOC8+hCRt4iOn65SFeC+zbOnQrvp0xtVe0CwzJEWXWJFOA7kjaHrNAm8eUhsD9dsF zFe8jnTvvSoFpZI6wUfDT19c8KnHNMdai86ZOo+HLm5dSwpakpEkmHTib8XYk6KFH9/1 uvaF2frRx1fYq9OXzRznfVfHatyHEfocbBl2Szbfl7Cd/sIwDL7wnBtyDaB45BIu7Gfd 4g+FgwWCwz8xYKwlalP3xn3IPWjA6ERq6qRDo+DfFOIRxN8S+PLNUiQwiPzapFHnP99F 3Gxg== X-Gm-Message-State: AFqh2kqmCNNzP/qMn4icmXkmzw/rdTnksver8qAJ3oqemxO3G4SFPMy2 pAI+fHI3Z5w0Xtg7FjbH+3UVG9XyAaCqH9R5Qwk= X-Google-Smtp-Source: AMrXdXsDkomnAjgGHC4405boHN8CJZXuj4Yimy1JxNCrdSjGIrkNlywUuNUhB8eBEz6GYSYXg25DAhZJrPehFDzsGsw= X-Received: by 2002:a67:f787:0:b0:3b1:40eb:5957 with SMTP id j7-20020a67f787000000b003b140eb5957mr7260239vso.66.1672995556736; Fri, 06 Jan 2023 00:59:16 -0800 (PST) MIME-Version: 1.0 References: <20221117072558.3582292-1-asekhar@marvell.com> <20221117072558.3582292-3-asekhar@marvell.com> In-Reply-To: <20221117072558.3582292-3-asekhar@marvell.com> From: Jerin Jacob Date: Fri, 6 Jan 2023 14:28:50 +0530 Message-ID: Subject: Re: [PATCH v1 3/3] net/cnxk: add debug check for number of Tx descriptors To: Ashwin Sekhar T K Cc: dev@dpdk.org, Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , jerinj@marvell.com, pbhagavatula@marvell.com, psatheesh@marvell.com, anoobj@marvell.com, gakhil@marvell.com, hkalra@marvell.com Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Thu, Nov 17, 2022 at 12:56 PM Ashwin Sekhar T K wrote: > > When SG2 descriptors are used and more than 5 segments > are present, in certain combination of segments the > number of descriptors required will be greater than > 16. > > In debug builds, add an assert to capture this scenario. > > Signed-off-by: Ashwin Sekhar T K Series applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > drivers/net/cnxk/cn10k_tx.h | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h > index 3f08a8a473..09c332b2b5 100644 > --- a/drivers/net/cnxk/cn10k_tx.h > +++ b/drivers/net/cnxk/cn10k_tx.h > @@ -84,6 +84,22 @@ cn10k_nix_mbuf_sg_dwords(struct rte_mbuf *m) > return (segw + 1) / 2; > } > > +static __plt_always_inline void > +cn10k_nix_tx_mbuf_validate(struct rte_mbuf *m, const uint32_t flags) > +{ > +#ifdef RTE_LIBRTE_MBUF_DEBUG > + uint16_t segdw; > + > + segdw = cn10k_nix_mbuf_sg_dwords(m); > + segdw += 1 + !!(flags & NIX_TX_NEED_EXT_HDR) + !!(flags & NIX_TX_OFFLOAD_TSTAMP_F); > + > + PLT_ASSERT(segdw <= 8); > +#else > + RTE_SET_USED(m); > + RTE_SET_USED(flags); > +#endif > +} > + > static __plt_always_inline void > cn10k_nix_vwqe_wait_fc(struct cn10k_eth_txq *txq, int64_t req) > { > @@ -1307,6 +1323,8 @@ cn10k_nix_xmit_pkts_mseg(void *tx_queue, uint64_t *ws, > } > > for (i = 0; i < burst; i++) { > + cn10k_nix_tx_mbuf_validate(tx_pkts[i], flags); > + > /* Perform header writes for TSO, barrier at > * lmt steorl will suffice. > */ > @@ -1906,6 +1924,8 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, > for (j = 0; j < NIX_DESCS_PER_LOOP; j++) { > struct rte_mbuf *m = tx_pkts[j]; > > + cn10k_nix_tx_mbuf_validate(m, flags); > + > /* Get dwords based on nb_segs. */ > if (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F && > flags & NIX_TX_MULTI_SEG_F)) > -- > 2.25.1 >