From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id CD46DA31F3 for ; Fri, 18 Oct 2019 16:25:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 94B1A1C08E; Fri, 18 Oct 2019 16:25:14 +0200 (CEST) Received: from mail-io1-f67.google.com (mail-io1-f67.google.com [209.85.166.67]) by dpdk.org (Postfix) with ESMTP id 73F5A1C07F for ; Fri, 18 Oct 2019 16:25:12 +0200 (CEST) Received: by mail-io1-f67.google.com with SMTP id t18so3551759iog.2 for ; Fri, 18 Oct 2019 07:25:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=eoherxRtM42vCkHNIfoBg1DcUJ3X6LdqfvjcW2BZ5ek=; b=Mq5rTiLUgkiX6YcwZ89fIbLlWgypzAc6NUBgYDts2/ZcHOJDOtR4ZVbNrPaDuMU63B SaiBFYEOfJ2rCTaYlMLmvBJ49nqik7ejyEamHmitAM6NHSf+fZK2YGwiYLSRrCBcoz8c YyFRfFdw5wfpCYoPY7v291LXl11WWxGbMZdNYSoHw6B5jvo6ZX1hPAiXdRgeuS7B9kz2 QdRi7MiE/Y28ajjVUe/W4bkCbyveV6g5gmhmyZD18c2FVPL4F6859/lJvnbbM3U9JdEa 7OMZCmSR4HxDnL2E+oMR/Rz9gtp6Q48oQnfHy8ySgDTXmQX0UH06fsmgVm50IbPytbuX +Mbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=eoherxRtM42vCkHNIfoBg1DcUJ3X6LdqfvjcW2BZ5ek=; b=WPCTVsHy1cHtUJaxehLQODR9y32TXIJdMGwzCQK3Om2sJGYkhwl/YTl6GjWAYi0WOz QeDpZE4vYZs8vh3nBUNz/6b0nv/bC3ZAzQ2G9Aonz+ZLWNMn3Su4tI0MPNA4APjZXtMC EkDlIzf7k99Er9Kxhir5F4PRUvL70VlEW2ZoMthq30EunpXPqbZjo65YJaa/86VBscqr ogUOHMoeFPRfL94OcpKtYlQhXAH5T9MEE1Texk0gP1Ejai4LeQqIa/d+tQCVWTs+bPsA 6aYiJw/OuAxlLPf0hqD0nRsIcXq85fuv/2g6HZ/yi8BL6zCy9/TVbIt/njT47xnkD6eE /iWw== X-Gm-Message-State: APjAAAV9AhUcgG6yReXUMnsbikuzy0qrKrsEF6mrNLMe79aZcqPLCv2f AqizYXBjIOrn9tx2IFh+8F1o9XXujb0NUfxY424= X-Google-Smtp-Source: APXvYqzqtvPpd82C18y2iQi8RqY1iIaSt/lmeRM+luHRZsyttfEp4MsQzujYRBKjije9lfic5y/y9Z6HLjhPxfNxSlg= X-Received: by 2002:a6b:c701:: with SMTP id x1mr9071390iof.162.1571408711329; Fri, 18 Oct 2019 07:25:11 -0700 (PDT) MIME-Version: 1.0 References: <1571139508-21701-1-git-send-email-phil.yang@arm.com> <1571397690-14116-1-git-send-email-phil.yang@arm.com> In-Reply-To: From: Jerin Jacob Date: Fri, 18 Oct 2019 19:54:59 +0530 Message-ID: To: David Marchand Cc: Jerin Jacob Kollanukkaran , Phil Yang , Gage Eads , dev , Thomas Monjalon , Hemant Agrawal , Honnappa Nagarahalli , Gavin Hu , nd , Bruce Richardson Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v11 1/3] eal/arm64: add 128-bit atomic compare exchange X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Oct 18, 2019 at 7:46 PM David Marchand wrote: > > On Fri, Oct 18, 2019 at 1:22 PM Phil Yang wrote: > > > > This patch adds the implementation of the 128-bit atomic compare > > exchange API on AArch64. Using 64-bit 'ldxp/stxp' instructions > > can perform this operation. Moreover, on the LSE atomic extension > > accelerated platforms, it implemented by 'casp' instructions for > > better performance. > > > > Since the '__ARM_FEATURE_ATOMICS' flag only supports GCC-9, so this > > patch adds a new config flag 'RTE_ARM_FEATURE_ATOMICS' to enable the > > 'cas' version on elder version compilers. > > Jerin, Phil, > > I am getting a build error on the octeontx2 target: > > {standard input}: Assembler messages: > {standard input}:672: Error: selected processor does not support `casp > x0,x1,x2,x3,[x4]' > {standard input}:690: Error: selected processor does not support > `caspa x0,x1,x2,x3,[x4]' > {standard input}:708: Error: selected processor does not support > `caspl x0,x1,x2,x3,[x4]' > {standard input}:726: Error: selected processor does not support > `caspal x0,x1,x2,x3,[x4]' > ninja: build stopped: subcommand failed. > > Looking into the meson logs, I can see: > > Native C compiler: ccache gcc (gcc 9.2.1 "gcc (GCC) 9.2.1 20190827 > (Red Hat 9.2.1-1)") > Cross C compiler: aarch64-linux-gnu-gcc (gcc 8.2.1) > Host machine cpu family: aarch64 > Host machine cpu: armv8-a > Target machine cpu family: aarch64 > Target machine cpu: armv8-a > Build machine cpu family: x86_64 > Build machine cpu: x86_64 > ... > Message: Implementer : Cavium > Compiler for C supports arguments -mcpu=octeontx2: NO The compiler needs either +lse or mcpu=octeontx2 to generate casp instruction. Could you try this patch, I can submit a patch if it works for you. [master][dpdk-next-net-mrvl] $ git diff diff --git a/config/arm/meson.build b/config/arm/meson.build index 979018e16..466522786 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -96,7 +96,7 @@ machine_args_cavium = [ ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra], - ['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]] + ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) impl_generic = ['Generic armv8', flags_generic, machine_args_generic]