From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 803DD43CA0; Wed, 13 Mar 2024 15:29:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D6D79406BC; Wed, 13 Mar 2024 15:29:44 +0100 (CET) Received: from mail-ot1-f46.google.com (mail-ot1-f46.google.com [209.85.210.46]) by mails.dpdk.org (Postfix) with ESMTP id 9CCC1402B8 for ; Wed, 13 Mar 2024 15:29:43 +0100 (CET) Received: by mail-ot1-f46.google.com with SMTP id 46e09a7af769-6e445b4f80bso3054813a34.0 for ; Wed, 13 Mar 2024 07:29:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1710340183; x=1710944983; darn=dpdk.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=SOF1SSj/MOmnCTTUUtxjzjNsQ3CYdHBhoYP2m73RR4k=; b=jwdZgAB9PiSLGxuntMuMQzctJDLs3g9zAtOg7xvnI9U+nOuWHOdZWWw7LbYqnxCikO MZmvsr4B0rML/lSYUu/cV4Wws8sZ1UOAD3zngJyLdDdTH31LBrb6Gp/tA1HYIKKbOpW9 NyS6gkbUXpNHz1pyx3psYWnk22GYnSac+mC46uEgaFgtMgaUmlmThudIG0Jbv6n5ynhD hs0XM59Ys7/calYe9XIqJ8d8ptJvtGxQoGI75fVa0A3jwlJxu3mfRIVaaQI+QGFbvgZg /OQdHqevvw+0ZuQCxszrWf8U6DHglnFt79nejvZYDcMvMX1b88t1JyQolhBYdwgD3ZPP pWUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710340183; x=1710944983; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SOF1SSj/MOmnCTTUUtxjzjNsQ3CYdHBhoYP2m73RR4k=; b=BVKtu2TK1158os21pgLDO/qnJ1px5NLO2ucwMJqRnD1vZgUlwkR0yWa/Bu7VKRNajJ x1WMhS8Pfl8YMyYE/7Gg8ehCsUNOmb/arcE6uZQfwn7i5aAcruxEHDU58eFaOU0xvWhu nRYM8nSTlhgJE5y6FwtbmK/lD/qCAofI6tMXylLDFxn+s60+KWxLRd9lJJzWP9CuSG// qT5XqJk1SlCbr3WiXZa7DgpS3zndrWskX/thFIrxVxAaQPf47DKWKHb0djQrLhcLWXVO OiheXfX65C0AUm7j/dR6awUCodzocZzlEj8sv0eHwnUJDLzkHsKR8EuSSE7JByFuKrXY sjDg== X-Gm-Message-State: AOJu0YxxvMYbUrmS+zp3bc/gePYJb34aJGB7BUgAcfO02+gFK+mZvYMK /ZZr3C2Eihhd5TCqbqpifCkxGx2q5d9YmKARXZEEzT466qcOqE3k7XKlgL+47jSw1hjgZtqvybJ qrtim58P0CGUQBOuq7w206qX2bHQ= X-Google-Smtp-Source: AGHT+IGRo2pYJ2sK3noYy87tnxYiVp4f5GzOTfNQ03DX5KUluf0ezyTL8MVR+IyBIJ+OC+erLSQZNab15M+NJEij0Mo= X-Received: by 2002:a05:6830:18ec:b0:6e5:780:6256 with SMTP id d12-20020a05683018ec00b006e507806256mr43180otf.14.1710340182309; Wed, 13 Mar 2024 07:29:42 -0700 (PDT) MIME-Version: 1.0 References: <20240311163912.11229-1-stephen@networkplumber.org> <20240312150240.6373-1-stephen@networkplumber.org> In-Reply-To: <20240312150240.6373-1-stephen@networkplumber.org> From: Jerin Jacob Date: Wed, 13 Mar 2024 19:59:15 +0530 Message-ID: Subject: Re: [PATCH v2] net/bnx2x: fix indentation To: Stephen Hemminger Cc: dev@dpdk.org, Julien Aube Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Tue, Mar 12, 2024 at 8:55=E2=80=AFPM Stephen Hemminger wrote: > > The DPDK style of indentation uses tabs not spaces. > This file had mix of both. Convert it. > > Signed-off-by: Stephen Hemminger Applied to dpdk-next-net-mrvl/for-main. Thanks > --- > v2 - fix resulting checkpatch warnings > > drivers/net/bnx2x/bnx2x_stats.c | 1659 +++++++++++++++---------------- > 1 file changed, 818 insertions(+), 841 deletions(-) > > diff --git a/drivers/net/bnx2x/bnx2x_stats.c b/drivers/net/bnx2x/bnx2x_st= ats.c > index 69132c7c806e..f15b97116b94 100644 > --- a/drivers/net/bnx2x/bnx2x_stats.c > +++ b/drivers/net/bnx2x/bnx2x_stats.c > @@ -29,14 +29,12 @@ bnx2x_get_port_stats_dma_len(struct bnx2x_softc *sc) > /* 'newest' convention - shmem2 contains the size of the port sta= ts */ > if (SHMEM2_HAS(sc, sizeof_port_stats)) { > size =3D SHMEM2_RD(sc, sizeof_port_stats); > - if (size) { > + if (size) > res =3D size; > - } > > /* prevent newer BC from causing buffer overflow */ > - if (res > sizeof(struct host_port_stats)) { > + if (res > sizeof(struct host_port_stats)) > res =3D sizeof(struct host_port_stats); > - } > } > > /* > @@ -44,7 +42,7 @@ bnx2x_get_port_stats_dma_len(struct bnx2x_softc *sc) > * the 'not_used' field > */ > if (!res) { > - res =3D (offsetof(struct host_port_stats, not_used) + 4); > + res =3D offsetof(struct host_port_stats, not_used) + 4; > > /* if PFC stats are supported by the MFW, DMA them as wel= l */ > if (sc->devinfo.bc_ver >=3D REQ_BC_VER_4_PFC_STATS_SUPPOR= TED) { > @@ -75,9 +73,8 @@ bnx2x_storm_stats_post(struct bnx2x_softc *sc) > int rc; > > if (!sc->stats_pending) { > - if (sc->stats_pending) { > + if (sc->stats_pending) > return; > - } > > sc->fw_stats_req->hdr.drv_stats_counter =3D > htole16(sc->stats_counter++); > @@ -93,9 +90,8 @@ bnx2x_storm_stats_post(struct bnx2x_softc *sc) > U64_HI(sc->fw_stats_req_mapping), > U64_LO(sc->fw_stats_req_mapping), > NONE_CONNECTION_TYPE); > - if (rc =3D=3D 0) { > + if (rc =3D=3D 0) > sc->stats_pending =3D 1; > - } > } > } > > @@ -108,15 +104,13 @@ bnx2x_hw_stats_post(struct bnx2x_softc *sc) > uint32_t opcode; > > *stats_comp =3D DMAE_COMP_VAL; > - if (CHIP_REV_IS_SLOW(sc)) { > + if (CHIP_REV_IS_SLOW(sc)) > return; > - } > > /* Update MCP's statistics if possible */ > - if (sc->func_stx) { > + if (sc->func_stx) > memcpy(BNX2X_SP(sc, func_stats), &sc->func_stats, > sizeof(sc->func_stats)); > - } > > /* loader */ > if (sc->executer_idx) { > @@ -230,667 +224,664 @@ bnx2x_stats_pmf_update(struct bnx2x_softc *sc) > static void > bnx2x_port_stats_init(struct bnx2x_softc *sc) > { > - struct dmae_command *dmae; > - int port =3D SC_PORT(sc); > - uint32_t opcode; > - int loader_idx =3D PMF_DMAE_C(sc); > - uint32_t mac_addr; > - uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > - > - /* sanity */ > - if (!sc->link_vars.link_up || !sc->port.pmf) { > - PMD_DRV_LOG(ERR, sc, "BUG!"); > - return; > - } > - > - sc->executer_idx =3D 0; > - > - /* MCP */ > - opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, > - TRUE, DMAE_COMP_GRC); > - > - if (sc->port.port_stx) { > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > - dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, port_stats)); > - dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, port_stats)); > - dmae->dst_addr_lo =3D sc->port.port_stx >> 2; > - dmae->dst_addr_hi =3D 0; > - dmae->len =3D bnx2x_get_port_stats_dma_len(sc); > - dmae->comp_addr_lo =3D dmae_reg_go_c[loader_idx] >> 2; > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > - } > + struct dmae_command *dmae; > + int port =3D SC_PORT(sc); > + uint32_t opcode; > + int loader_idx =3D PMF_DMAE_C(sc); > + uint32_t mac_addr; > + uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > > - if (sc->func_stx) { > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > - dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, func_stats)); > - dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, func_stats)); > - dmae->dst_addr_lo =3D (sc->func_stx >> 2); > - dmae->dst_addr_hi =3D 0; > - dmae->len =3D (sizeof(struct host_func_stats) >> 2); > - dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > - } > + /* sanity */ > + if (!sc->link_vars.link_up || !sc->port.pmf) { > + PMD_DRV_LOG(ERR, sc, "BUG!"); > + return; > + } > > - /* MAC */ > - opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, > - TRUE, DMAE_COMP_GRC); > + sc->executer_idx =3D 0; > > - /* EMAC is special */ > - if (sc->link_vars.mac_type =3D=3D ELINK_MAC_TYPE_EMAC) { > - mac_addr =3D (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0); > + /* MCP */ > + opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, > + TRUE, DMAE_COMP_GRC); > > - /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/ > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > - dmae->src_addr_lo =3D (mac_addr + EMAC_REG_EMAC_RX_STAT_AC) >> 2; > - dmae->src_addr_hi =3D 0; > - dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, mac_stats)); > - dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, mac_stats)); > - dmae->len =3D EMAC_REG_EMAC_RX_STAT_AC_COUNT; > - dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > + if (sc->port.port_stx) { > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, port_st= ats)); > + dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, port_st= ats)); > + dmae->dst_addr_lo =3D sc->port.port_stx >> 2; > + dmae->dst_addr_hi =3D 0; > + dmae->len =3D bnx2x_get_port_stats_dma_len(sc); > + dmae->comp_addr_lo =3D dmae_reg_go_c[loader_idx] >> 2; > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > + } > > - /* EMAC_REG_EMAC_RX_STAT_AC_28 */ > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > - dmae->src_addr_lo =3D ((mac_addr + EMAC_REG_EMAC_RX_STAT_AC_28) >= > 2); > - dmae->src_addr_hi =3D 0; > - dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, mac_stats) + > - offsetof(struct emac_stats, > - rx_stat_falsecarriererrors)); > - dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, mac_stats) + > - offsetof(struct emac_stats, > - rx_stat_falsecarriererrors)); > - dmae->len =3D 1; > - dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > + if (sc->func_stx) { > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, func_st= ats)); > + dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, func_st= ats)); > + dmae->dst_addr_lo =3D (sc->func_stx >> 2); > + dmae->dst_addr_hi =3D 0; > + dmae->len =3D (sizeof(struct host_func_stats) >> 2); > + dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > + } > > - /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/ > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > - dmae->src_addr_lo =3D ((mac_addr + EMAC_REG_EMAC_TX_STAT_AC) >> 2= ); > - dmae->src_addr_hi =3D 0; > - dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, mac_stats) + > - offsetof(struct emac_stats, > - tx_stat_ifhcoutoctets)); > - dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, mac_stats) + > - offsetof(struct emac_stats, > - tx_stat_ifhcoutoctets)); > - dmae->len =3D EMAC_REG_EMAC_TX_STAT_AC_COUNT; > - dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > - } else { > - uint32_t tx_src_addr_lo, rx_src_addr_lo; > - uint16_t rx_len, tx_len; > + /* MAC */ > + opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, > + TRUE, DMAE_COMP_GRC); > > - /* configure the params according to MAC type */ > - switch (sc->link_vars.mac_type) { > - case ELINK_MAC_TYPE_BMAC: > - mac_addr =3D (port) ? NIG_REG_INGRESS_BMAC1_MEM : > - NIG_REG_INGRESS_BMAC0_MEM; > - > - /* BIGMAC_REGISTER_TX_STAT_GTPKT .. > - BIGMAC_REGISTER_TX_STAT_GTBYT */ > - if (CHIP_IS_E1x(sc)) { > - tx_src_addr_lo =3D > - ((mac_addr + BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2); > - tx_len =3D ((8 + BIGMAC_REGISTER_TX_STAT_GTBYT - > - BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2); > - rx_src_addr_lo =3D > - ((mac_addr + BIGMAC_REGISTER_RX_STAT_GR64) >> 2); > - rx_len =3D ((8 + BIGMAC_REGISTER_RX_STAT_GRIPJ - > - BIGMAC_REGISTER_RX_STAT_GR64) >> 2); > - } else { > - tx_src_addr_lo =3D > - ((mac_addr + BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2); > - tx_len =3D ((8 + BIGMAC2_REGISTER_TX_STAT_GTBYT - > - BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2); > - rx_src_addr_lo =3D > - ((mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2); > - rx_len =3D ((8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ - > - BIGMAC2_REGISTER_RX_STAT_GR64) >> 2); > - } > - > - break; > - > - case ELINK_MAC_TYPE_UMAC: /* handled by MSTAT */ > - case ELINK_MAC_TYPE_XMAC: /* handled by MSTAT */ > - default: > - mac_addr =3D (port) ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0; > - tx_src_addr_lo =3D ((mac_addr + MSTAT_REG_TX_STAT_GTXPOK_LO) = >> 2); > - rx_src_addr_lo =3D ((mac_addr + MSTAT_REG_RX_STAT_GR64_LO) >>= 2); > - tx_len =3D > - (sizeof(sc->sp->mac_stats.mstat_stats.stats_tx) >> 2); > - rx_len =3D > - (sizeof(sc->sp->mac_stats.mstat_stats.stats_rx) >> 2); > - break; > + /* EMAC is special */ > + if (sc->link_vars.mac_type =3D=3D ELINK_MAC_TYPE_EMAC) { > + mac_addr =3D (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0); > + > + /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COU= NT)*/ > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_lo =3D (mac_addr + EMAC_REG_EMAC_RX_STAT_A= C) >> 2; > + dmae->src_addr_hi =3D 0; > + dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, mac_sta= ts)); > + dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, mac_sta= ts)); > + dmae->len =3D EMAC_REG_EMAC_RX_STAT_AC_COUNT; > + dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > + > + /* EMAC_REG_EMAC_RX_STAT_AC_28 */ > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_lo =3D ((mac_addr + EMAC_REG_EMAC_RX_STAT_= AC_28) >> 2); > + dmae->src_addr_hi =3D 0; > + dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, mac_sta= ts) + > + offsetof(struct emac_stats, > + rx_stat_falsecarriere= rrors)); > + dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, mac_sta= ts) + > + offsetof(struct emac_stats, > + rx_stat_falsecarriere= rrors)); > + dmae->len =3D 1; > + dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > + > + /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COU= NT)*/ > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_lo =3D ((mac_addr + EMAC_REG_EMAC_TX_STAT_= AC) >> 2); > + dmae->src_addr_hi =3D 0; > + dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, mac_sta= ts) + > + offsetof(struct emac_stats, > + tx_stat_ifhcoutoctets= )); > + dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, mac_sta= ts) + > + offsetof(struct emac_stats, > + tx_stat_ifhcoutoctets= )); > + dmae->len =3D EMAC_REG_EMAC_TX_STAT_AC_COUNT; > + dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > + } else { > + uint32_t tx_src_addr_lo, rx_src_addr_lo; > + uint16_t rx_len, tx_len; > + > + /* configure the params according to MAC type */ > + switch (sc->link_vars.mac_type) { > + case ELINK_MAC_TYPE_BMAC: > + mac_addr =3D (port) ? NIG_REG_INGRESS_BMAC1_MEM : > + NIG_REG_INGRESS_BMAC0_MEM; > + > + /* > + * BIGMAC_REGISTER_TX_STAT_GTPKT .. > + * BIGMAC_REGISTER_TX_STAT_GTBYT > + */ > + if (CHIP_IS_E1x(sc)) { > + tx_src_addr_lo =3D > + ((mac_addr + BIGMAC_REGISTER_TX_S= TAT_GTPKT) >> 2); > + tx_len =3D ((8 + BIGMAC_REGISTER_TX_STAT_= GTBYT - > + BIGMAC_REGISTER_TX_STAT_GTPKT)= >> 2); > + rx_src_addr_lo =3D > + ((mac_addr + BIGMAC_REGISTER_RX_S= TAT_GR64) >> 2); > + rx_len =3D ((8 + BIGMAC_REGISTER_RX_STAT_= GRIPJ - > + BIGMAC_REGISTER_RX_STAT_GR64) = >> 2); > + } else { > + tx_src_addr_lo =3D > + ((mac_addr + BIGMAC2_REGISTER_TX_= STAT_GTPOK) >> 2); > + tx_len =3D ((8 + BIGMAC2_REGISTER_TX_STAT= _GTBYT - > + BIGMAC2_REGISTER_TX_STAT_GTPOK= ) >> 2); > + rx_src_addr_lo =3D > + ((mac_addr + BIGMAC2_REGISTER_RX_= STAT_GR64) >> 2); > + rx_len =3D ((8 + BIGMAC2_REGISTER_RX_STAT= _GRIPJ - > + BIGMAC2_REGISTER_RX_STAT_GR64)= >> 2); > + } > + > + break; > + > + case ELINK_MAC_TYPE_UMAC: /* handled by MSTAT */ > + case ELINK_MAC_TYPE_XMAC: /* handled by MSTAT */ > + default: > + mac_addr =3D (port) ? GRCBASE_MSTAT1 : GRCBASE_MS= TAT0; > + tx_src_addr_lo =3D ((mac_addr + MSTAT_REG_TX_STAT= _GTXPOK_LO) >> 2); > + rx_src_addr_lo =3D ((mac_addr + MSTAT_REG_RX_STAT= _GR64_LO) >> 2); > + tx_len =3D > + (sizeof(sc->sp->mac_stats.mstat_stats.sta= ts_tx) >> 2); > + rx_len =3D > + (sizeof(sc->sp->mac_stats.mstat_stats.sta= ts_rx) >> 2); > + break; > + } > + > + /* TX stats */ > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_lo =3D tx_src_addr_lo; > + dmae->src_addr_hi =3D 0; > + dmae->len =3D tx_len; > + dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, mac_sta= ts)); > + dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, mac_sta= ts)); > + dmae->comp_addr_lo =3D dmae_reg_go_c[loader_idx] >> 2; > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > + > + /* RX stats */ > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_hi =3D 0; > + dmae->src_addr_lo =3D rx_src_addr_lo; > + dmae->dst_addr_lo =3D > + U64_LO(BNX2X_SP_MAPPING(sc, mac_stats) + (tx_len = << 2)); > + dmae->dst_addr_hi =3D > + U64_HI(BNX2X_SP_MAPPING(sc, mac_stats) + (tx_len = << 2)); > + dmae->len =3D rx_len; > + dmae->comp_addr_lo =3D dmae_reg_go_c[loader_idx] >> 2; > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > } > > - /* TX stats */ > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > - dmae->src_addr_lo =3D tx_src_addr_lo; > - dmae->src_addr_hi =3D 0; > - dmae->len =3D tx_len; > - dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, mac_stats)); > - dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, mac_stats)); > - dmae->comp_addr_lo =3D dmae_reg_go_c[loader_idx] >> 2; > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > + /* NIG */ > + if (!CHIP_IS_E3(sc)) { > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_lo =3D > + (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 : > + NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2; > + dmae->src_addr_hi =3D 0; > + dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, nig_sta= ts) + > + offsetof(struct nig_stats, > + egress_mac_pkt0_lo)); > + dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, nig_sta= ts) + > + offsetof(struct nig_stats, > + egress_mac_pkt0_lo)); > + dmae->len =3D ((2 * sizeof(uint32_t)) >> 2); > + dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > > - /* RX stats */ > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > - dmae->src_addr_hi =3D 0; > - dmae->src_addr_lo =3D rx_src_addr_lo; > - dmae->dst_addr_lo =3D > - U64_LO(BNX2X_SP_MAPPING(sc, mac_stats) + (tx_len << 2)); > - dmae->dst_addr_hi =3D > - U64_HI(BNX2X_SP_MAPPING(sc, mac_stats) + (tx_len << 2)); > - dmae->len =3D rx_len; > - dmae->comp_addr_lo =3D dmae_reg_go_c[loader_idx] >> 2; > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > - } > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D opcode; > + dmae->src_addr_lo =3D > + (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : > + NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; > + dmae->src_addr_hi =3D 0; > + dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, nig_sta= ts) + > + offsetof(struct nig_stats, > + egress_mac_pkt1_lo)); > + dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, nig_sta= ts) + > + offsetof(struct nig_stats, > + egress_mac_pkt1_lo)); > + dmae->len =3D ((2 * sizeof(uint32_t)) >> 2); > + dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > + } > > - /* NIG */ > - if (!CHIP_IS_E3(sc)) { > dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > + dmae->opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI= , > + TRUE, DMAE_COMP_PCI); > dmae->src_addr_lo =3D > - (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 : > - NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2; > + (port ? NIG_REG_STAT1_BRB_DISCARD : > + NIG_REG_STAT0_BRB_DISCARD) >> 2; > dmae->src_addr_hi =3D 0; > - dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, nig_stats) + > - offsetof(struct nig_stats, > - egress_mac_pkt0_lo)); > - dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, nig_stats) + > - offsetof(struct nig_stats, > - egress_mac_pkt0_lo)); > - dmae->len =3D ((2 * sizeof(uint32_t)) >> 2); > - dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > + dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, nig_stats)); > + dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, nig_stats)); > + dmae->len =3D (sizeof(struct nig_stats) - 4 * sizeof(uint32_t)) >= > 2; > > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D opcode; > - dmae->src_addr_lo =3D > - (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : > - NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; > - dmae->src_addr_hi =3D 0; > - dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, nig_stats) + > - offsetof(struct nig_stats, > - egress_mac_pkt1_lo)); > - dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, nig_stats) + > - offsetof(struct nig_stats, > - egress_mac_pkt1_lo)); > - dmae->len =3D ((2 * sizeof(uint32_t)) >> 2); > - dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > - } > - > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, > - TRUE, DMAE_COMP_PCI); > - dmae->src_addr_lo =3D > - (port ? NIG_REG_STAT1_BRB_DISCARD : > - NIG_REG_STAT0_BRB_DISCARD) >> 2; > - dmae->src_addr_hi =3D 0; > - dmae->dst_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, nig_stats)); > - dmae->dst_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, nig_stats)); > - dmae->len =3D (sizeof(struct nig_stats) - 4*sizeof(uint32_t)) >> 2; > - > - dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_comp)); > - dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_comp)); > - dmae->comp_val =3D DMAE_COMP_VAL; > - > - *stats_comp =3D 0; > + dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_comp)); > + dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_comp)); > + dmae->comp_val =3D DMAE_COMP_VAL; > + > + *stats_comp =3D 0; > } > > static void > bnx2x_func_stats_init(struct bnx2x_softc *sc) > { > - struct dmae_command *dmae =3D &sc->stats_dmae; > - uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > - > - /* sanity */ > - if (!sc->func_stx) { > - PMD_DRV_LOG(ERR, sc, "BUG!"); > - return; > - } > - > - sc->executer_idx =3D 0; > - memset(dmae, 0, sizeof(struct dmae_command)); > - > - dmae->opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, > - TRUE, DMAE_COMP_PCI); > - dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, func_stats)); > - dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, func_stats)); > - dmae->dst_addr_lo =3D (sc->func_stx >> 2); > - dmae->dst_addr_hi =3D 0; > - dmae->len =3D (sizeof(struct host_func_stats) >> 2); > - dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_comp)); > - dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_comp)); > - dmae->comp_val =3D DMAE_COMP_VAL; > - > - *stats_comp =3D 0; > + struct dmae_command *dmae =3D &sc->stats_dmae; > + uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > + > + /* sanity */ > + if (!sc->func_stx) { > + PMD_DRV_LOG(ERR, sc, "BUG!"); > + return; > + } > + > + sc->executer_idx =3D 0; > + memset(dmae, 0, sizeof(struct dmae_command)); > + > + dmae->opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC= , > + TRUE, DMAE_COMP_PCI); > + dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, func_stats)); > + dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, func_stats)); > + dmae->dst_addr_lo =3D (sc->func_stx >> 2); > + dmae->dst_addr_hi =3D 0; > + dmae->len =3D (sizeof(struct host_func_stats) >> 2); > + dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_comp)); > + dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_comp)); > + dmae->comp_val =3D DMAE_COMP_VAL; > + > + *stats_comp =3D 0; > } > > static void > bnx2x_stats_start(struct bnx2x_softc *sc) > { > - /* > - * VFs travel through here as part of the statistics FSM, but no act= ion > - * is required > - */ > - if (IS_VF(sc)) { > - return; > - } > - > - if (sc->port.pmf) { > - bnx2x_port_stats_init(sc); > - } > - > - else if (sc->func_stx) { > - bnx2x_func_stats_init(sc); > - } > - > - bnx2x_hw_stats_post(sc); > - bnx2x_storm_stats_post(sc); > + /* > + * VFs travel through here as part of the statistics FSM, but no = action > + * is required > + */ > + if (IS_VF(sc)) > + return; > + > + if (sc->port.pmf) > + bnx2x_port_stats_init(sc); > + else if (sc->func_stx) > + bnx2x_func_stats_init(sc); > + > + bnx2x_hw_stats_post(sc); > + bnx2x_storm_stats_post(sc); > } > > static void > bnx2x_stats_pmf_start(struct bnx2x_softc *sc) > { > - bnx2x_stats_comp(sc); > - bnx2x_stats_pmf_update(sc); > - bnx2x_stats_start(sc); > + bnx2x_stats_comp(sc); > + bnx2x_stats_pmf_update(sc); > + bnx2x_stats_start(sc); > } > > static void > bnx2x_stats_restart(struct bnx2x_softc *sc) > { > - /* > - * VFs travel through here as part of the statistics FSM, but no act= ion > - * is required > - */ > - if (IS_VF(sc)) { > - return; > - } > - > - bnx2x_stats_comp(sc); > - bnx2x_stats_start(sc); > + /* > + * VFs travel through here as part of the statistics FSM, but no = action > + * is required > + */ > + if (IS_VF(sc)) > + return; > + > + bnx2x_stats_comp(sc); > + bnx2x_stats_start(sc); > } > > static void > bnx2x_bmac_stats_update(struct bnx2x_softc *sc) > { > - struct host_port_stats *pstats =3D BNX2X_SP(sc, port_stats); > - struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > - struct { > - uint32_t lo; > - uint32_t hi; > - } diff; > - > - if (CHIP_IS_E1x(sc)) { > - struct bmac1_stats *new =3D BNX2X_SP(sc, mac_stats.bmac1_stats); > - > - /* the macros below will use "bmac1_stats" type */ > - UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); > - UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); > - UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); > - UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); > - UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); > - UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); > - UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); > - UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); > - UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); > - > - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); > - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); > - UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); > - UPDATE_STAT64(tx_stat_gt127, > - tx_stat_etherstatspkts65octetsto127octets); > - UPDATE_STAT64(tx_stat_gt255, > - tx_stat_etherstatspkts128octetsto255octets); > - UPDATE_STAT64(tx_stat_gt511, > - tx_stat_etherstatspkts256octetsto511octets); > - UPDATE_STAT64(tx_stat_gt1023, > - tx_stat_etherstatspkts512octetsto1023octets); > - UPDATE_STAT64(tx_stat_gt1518, > - tx_stat_etherstatspkts1024octetsto1522octets); > - UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); > - UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); > - UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); > - UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); > - UPDATE_STAT64(tx_stat_gterr, > - tx_stat_dot3statsinternalmactransmiterrors); > - UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); > - } else { > - struct bmac2_stats *new =3D BNX2X_SP(sc, mac_stats.bmac2_stats); > - struct bnx2x_fw_port_stats_old *fwstats =3D &sc->fw_stats_old; > - > - /* the macros below will use "bmac2_stats" type */ > - UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); > - UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); > - UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); > - UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); > - UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); > - UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); > - UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); > - UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); > - UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); > - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); > - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); > - UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); > - UPDATE_STAT64(tx_stat_gt127, > - tx_stat_etherstatspkts65octetsto127octets); > - UPDATE_STAT64(tx_stat_gt255, > - tx_stat_etherstatspkts128octetsto255octets); > - UPDATE_STAT64(tx_stat_gt511, > - tx_stat_etherstatspkts256octetsto511octets); > - UPDATE_STAT64(tx_stat_gt1023, > - tx_stat_etherstatspkts512octetsto1023octets); > - UPDATE_STAT64(tx_stat_gt1518, > - tx_stat_etherstatspkts1024octetsto1522octets); > - UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); > - UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); > - UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); > - UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); > - UPDATE_STAT64(tx_stat_gterr, > - tx_stat_dot3statsinternalmactransmiterrors); > - UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); > - > - /* collect PFC stats */ > - pstats->pfc_frames_tx_hi =3D new->tx_stat_gtpp_hi; > - pstats->pfc_frames_tx_lo =3D new->tx_stat_gtpp_lo; > - ADD_64(pstats->pfc_frames_tx_hi, fwstats->pfc_frames_tx_hi, > - pstats->pfc_frames_tx_lo, fwstats->pfc_frames_tx_lo); > - > - pstats->pfc_frames_rx_hi =3D new->rx_stat_grpp_hi; > - pstats->pfc_frames_rx_lo =3D new->rx_stat_grpp_lo; > - ADD_64(pstats->pfc_frames_rx_hi, fwstats->pfc_frames_rx_hi, > - pstats->pfc_frames_rx_lo, fwstats->pfc_frames_rx_lo); > - } > - > - estats->pause_frames_received_hi =3D pstats->mac_stx[1].rx_stat_mac_= xpf_hi; > - estats->pause_frames_received_lo =3D pstats->mac_stx[1].rx_stat_mac_= xpf_lo; > - > - estats->pause_frames_sent_hi =3D pstats->mac_stx[1].tx_stat_outxoffs= ent_hi; > - estats->pause_frames_sent_lo =3D pstats->mac_stx[1].tx_stat_outxoffs= ent_lo; > - > - estats->pfc_frames_received_hi =3D pstats->pfc_frames_rx_hi; > - estats->pfc_frames_received_lo =3D pstats->pfc_frames_rx_lo; > - estats->pfc_frames_sent_hi =3D pstats->pfc_frames_tx_hi; > - estats->pfc_frames_sent_lo =3D pstats->pfc_frames_tx_lo; > + struct host_port_stats *pstats =3D BNX2X_SP(sc, port_stats); > + struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > + struct { > + uint32_t lo; > + uint32_t hi; > + } diff; > + > + if (CHIP_IS_E1x(sc)) { > + struct bmac1_stats *new =3D BNX2X_SP(sc, mac_stats.bmac1_= stats); > + > + /* the macros below will use "bmac1_stats" type */ > + UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); > + UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); > + UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizep= kts); > + UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolo= ng); > + UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments)= ; > + UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); > + UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesrece= ived); > + UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); > + UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); > + > + UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); > + UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); > + UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octet= s); > + UPDATE_STAT64(tx_stat_gt127, > + tx_stat_etherstatspkts65octetsto127octets); > + UPDATE_STAT64(tx_stat_gt255, > + tx_stat_etherstatspkts128octetsto255octets)= ; > + UPDATE_STAT64(tx_stat_gt511, > + tx_stat_etherstatspkts256octetsto511octets)= ; > + UPDATE_STAT64(tx_stat_gt1023, > + tx_stat_etherstatspkts512octetsto1023octets= ); > + UPDATE_STAT64(tx_stat_gt1518, > + tx_stat_etherstatspkts1024octetsto1522octet= s); > + UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); > + UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); > + UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); > + UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); > + UPDATE_STAT64(tx_stat_gterr, > + tx_stat_dot3statsinternalmactransmiterrors)= ; > + UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); > + } else { > + struct bmac2_stats *new =3D BNX2X_SP(sc, mac_stats.bmac2_= stats); > + struct bnx2x_fw_port_stats_old *fwstats =3D &sc->fw_stats= _old; > + > + /* the macros below will use "bmac2_stats" type */ > + UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); > + UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); > + UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizep= kts); > + UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolo= ng); > + UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments)= ; > + UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); > + UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesrece= ived); > + UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); > + UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); > + UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); > + UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); > + UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octet= s); > + UPDATE_STAT64(tx_stat_gt127, > + tx_stat_etherstatspkts65octetsto127octets); > + UPDATE_STAT64(tx_stat_gt255, > + tx_stat_etherstatspkts128octetsto255octets)= ; > + UPDATE_STAT64(tx_stat_gt511, > + tx_stat_etherstatspkts256octetsto511octets)= ; > + UPDATE_STAT64(tx_stat_gt1023, > + tx_stat_etherstatspkts512octetsto1023octets= ); > + UPDATE_STAT64(tx_stat_gt1518, > + tx_stat_etherstatspkts1024octetsto1522octet= s); > + UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); > + UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); > + UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); > + UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); > + UPDATE_STAT64(tx_stat_gterr, > + tx_stat_dot3statsinternalmactransmiterrors)= ; > + UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); > + > + /* collect PFC stats */ > + pstats->pfc_frames_tx_hi =3D new->tx_stat_gtpp_hi; > + pstats->pfc_frames_tx_lo =3D new->tx_stat_gtpp_lo; > + ADD_64(pstats->pfc_frames_tx_hi, fwstats->pfc_frames_tx_h= i, > + pstats->pfc_frames_tx_lo, fwstats->pfc_frames_tx_l= o); > + > + pstats->pfc_frames_rx_hi =3D new->rx_stat_grpp_hi; > + pstats->pfc_frames_rx_lo =3D new->rx_stat_grpp_lo; > + ADD_64(pstats->pfc_frames_rx_hi, fwstats->pfc_frames_rx_h= i, > + pstats->pfc_frames_rx_lo, fwstats->pfc_frames_rx_l= o); > + } > + > + estats->pause_frames_received_hi =3D pstats->mac_stx[1].rx_stat_m= ac_xpf_hi; > + estats->pause_frames_received_lo =3D pstats->mac_stx[1].rx_stat_m= ac_xpf_lo; > + > + estats->pause_frames_sent_hi =3D pstats->mac_stx[1].tx_stat_outxo= ffsent_hi; > + estats->pause_frames_sent_lo =3D pstats->mac_stx[1].tx_stat_outxo= ffsent_lo; > + > + estats->pfc_frames_received_hi =3D pstats->pfc_frames_rx_hi; > + estats->pfc_frames_received_lo =3D pstats->pfc_frames_rx_lo; > + estats->pfc_frames_sent_hi =3D pstats->pfc_frames_tx_hi; > + estats->pfc_frames_sent_lo =3D pstats->pfc_frames_tx_lo; > } > > static void > bnx2x_mstat_stats_update(struct bnx2x_softc *sc) > { > - struct host_port_stats *pstats =3D BNX2X_SP(sc, port_stats); > - struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > - struct mstat_stats *new =3D BNX2X_SP(sc, mac_stats.mstat_stats); > - > - ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets); > - ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors); > - ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts); > - ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong); > - ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments); > - ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived); > - ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered); > - ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf); > - ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent); > - ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone); > - > - /* collect pfc stats */ > - ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi, > - pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo); > - ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi, > - pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo); > - > - ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets); > - ADD_STAT64(stats_tx.tx_gt127, tx_stat_etherstatspkts65octetsto127oct= ets); > - ADD_STAT64(stats_tx.tx_gt255, tx_stat_etherstatspkts128octetsto255oc= tets); > - ADD_STAT64(stats_tx.tx_gt511, tx_stat_etherstatspkts256octetsto511oc= tets); > - ADD_STAT64(stats_tx.tx_gt1023, > - tx_stat_etherstatspkts512octetsto1023octets); > - ADD_STAT64(stats_tx.tx_gt1518, > - tx_stat_etherstatspkts1024octetsto1522octets); > - ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047); > - > - ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095); > - ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216); > - ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383); > - > - ADD_STAT64(stats_tx.tx_gterr, tx_stat_dot3statsinternalmactransmiter= rors); > - ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl); > - > - estats->etherstatspkts1024octetsto1522octets_hi =3D > - pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_h= i; > - estats->etherstatspkts1024octetsto1522octets_lo =3D > - pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_l= o; > - > - estats->etherstatspktsover1522octets_hi =3D > - pstats->mac_stx[1].tx_stat_mac_2047_hi; > - estats->etherstatspktsover1522octets_lo =3D > - pstats->mac_stx[1].tx_stat_mac_2047_lo; > - > - ADD_64(estats->etherstatspktsover1522octets_hi, > - pstats->mac_stx[1].tx_stat_mac_4095_hi, > - estats->etherstatspktsover1522octets_lo, > - pstats->mac_stx[1].tx_stat_mac_4095_lo); > - > - ADD_64(estats->etherstatspktsover1522octets_hi, > - pstats->mac_stx[1].tx_stat_mac_9216_hi, > - estats->etherstatspktsover1522octets_lo, > - pstats->mac_stx[1].tx_stat_mac_9216_lo); > - > - ADD_64(estats->etherstatspktsover1522octets_hi, > - pstats->mac_stx[1].tx_stat_mac_16383_hi, > - estats->etherstatspktsover1522octets_lo, > - pstats->mac_stx[1].tx_stat_mac_16383_lo); > - > - estats->pause_frames_received_hi =3D pstats->mac_stx[1].rx_stat_mac_= xpf_hi; > - estats->pause_frames_received_lo =3D pstats->mac_stx[1].rx_stat_mac_= xpf_lo; > - > - estats->pause_frames_sent_hi =3D pstats->mac_stx[1].tx_stat_outxoffs= ent_hi; > - estats->pause_frames_sent_lo =3D pstats->mac_stx[1].tx_stat_outxoffs= ent_lo; > - > - estats->pfc_frames_received_hi =3D pstats->pfc_frames_rx_hi; > - estats->pfc_frames_received_lo =3D pstats->pfc_frames_rx_lo; > - estats->pfc_frames_sent_hi =3D pstats->pfc_frames_tx_hi; > - estats->pfc_frames_sent_lo =3D pstats->pfc_frames_tx_lo; > + struct host_port_stats *pstats =3D BNX2X_SP(sc, port_stats); > + struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > + struct mstat_stats *new =3D BNX2X_SP(sc, mac_stats.mstat_stats); > + > + ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets); > + ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors); > + ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts); > + ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong); > + ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments); > + ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived); > + ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered); > + ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf); > + ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent); > + ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone); > + > + /* collect pfc stats */ > + ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi, > + pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo); > + ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi, > + pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo); > + > + ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets); > + ADD_STAT64(stats_tx.tx_gt127, tx_stat_etherstatspkts65octetsto127= octets); > + ADD_STAT64(stats_tx.tx_gt255, tx_stat_etherstatspkts128octetsto25= 5octets); > + ADD_STAT64(stats_tx.tx_gt511, tx_stat_etherstatspkts256octetsto51= 1octets); > + ADD_STAT64(stats_tx.tx_gt1023, > + tx_stat_etherstatspkts512octetsto1023octets); > + ADD_STAT64(stats_tx.tx_gt1518, > + tx_stat_etherstatspkts1024octetsto1522octets); > + ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047); > + > + ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095); > + ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216); > + ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383); > + > + ADD_STAT64(stats_tx.tx_gterr, tx_stat_dot3statsinternalmactransmi= terrors); > + ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl); > + > + estats->etherstatspkts1024octetsto1522octets_hi =3D > + pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522= octets_hi; > + estats->etherstatspkts1024octetsto1522octets_lo =3D > + pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522= octets_lo; > + > + estats->etherstatspktsover1522octets_hi =3D > + pstats->mac_stx[1].tx_stat_mac_2047_hi; > + estats->etherstatspktsover1522octets_lo =3D > + pstats->mac_stx[1].tx_stat_mac_2047_lo; > + > + ADD_64(estats->etherstatspktsover1522octets_hi, > + pstats->mac_stx[1].tx_stat_mac_4095_hi, > + estats->etherstatspktsover1522octets_lo, > + pstats->mac_stx[1].tx_stat_mac_4095_lo); > + > + ADD_64(estats->etherstatspktsover1522octets_hi, > + pstats->mac_stx[1].tx_stat_mac_9216_hi, > + estats->etherstatspktsover1522octets_lo, > + pstats->mac_stx[1].tx_stat_mac_9216_lo); > + > + ADD_64(estats->etherstatspktsover1522octets_hi, > + pstats->mac_stx[1].tx_stat_mac_16383_hi, > + estats->etherstatspktsover1522octets_lo, > + pstats->mac_stx[1].tx_stat_mac_16383_lo); > + > + estats->pause_frames_received_hi =3D pstats->mac_stx[1].rx_stat_m= ac_xpf_hi; > + estats->pause_frames_received_lo =3D pstats->mac_stx[1].rx_stat_m= ac_xpf_lo; > + > + estats->pause_frames_sent_hi =3D pstats->mac_stx[1].tx_stat_outxo= ffsent_hi; > + estats->pause_frames_sent_lo =3D pstats->mac_stx[1].tx_stat_outxo= ffsent_lo; > + > + estats->pfc_frames_received_hi =3D pstats->pfc_frames_rx_hi; > + estats->pfc_frames_received_lo =3D pstats->pfc_frames_rx_lo; > + estats->pfc_frames_sent_hi =3D pstats->pfc_frames_tx_hi; > + estats->pfc_frames_sent_lo =3D pstats->pfc_frames_tx_lo; > } > > static void > bnx2x_emac_stats_update(struct bnx2x_softc *sc) > { > - struct emac_stats *new =3D BNX2X_SP(sc, mac_stats.emac_stats); > - struct host_port_stats *pstats =3D BNX2X_SP(sc, port_stats); > - struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > - > - UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets); > - UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets); > - UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors); > - UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors); > - UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors); > - UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors); > - UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts); > - UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong); > - UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments); > - UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers); > - UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived); > - UPDATE_EXTEND_STAT(rx_stat_xoffstateentered); > - UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived); > - UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived); > - UPDATE_EXTEND_STAT(tx_stat_outxonsent); > - UPDATE_EXTEND_STAT(tx_stat_outxoffsent); > - UPDATE_EXTEND_STAT(tx_stat_flowcontroldone); > - UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions); > - UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes); > - UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes); > - UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions); > - UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions); > - UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions); > - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets); > - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets); > - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets); > - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets); > - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets); > - UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets); > - UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets); > - UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors); > - > - estats->pause_frames_received_hi =3D > - pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi; > - estats->pause_frames_received_lo =3D > - pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo; > - ADD_64(estats->pause_frames_received_hi, > - pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, > - estats->pause_frames_received_lo, > - pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); > - > - estats->pause_frames_sent_hi =3D > - pstats->mac_stx[1].tx_stat_outxonsent_hi; > - estats->pause_frames_sent_lo =3D > - pstats->mac_stx[1].tx_stat_outxonsent_lo; > - ADD_64(estats->pause_frames_sent_hi, > - pstats->mac_stx[1].tx_stat_outxoffsent_hi, > - estats->pause_frames_sent_lo, > - pstats->mac_stx[1].tx_stat_outxoffsent_lo); > + struct emac_stats *new =3D BNX2X_SP(sc, mac_stats.emac_stats); > + struct host_port_stats *pstats =3D BNX2X_SP(sc, port_stats); > + struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > + > + UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets); > + UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets); > + UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors); > + UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors); > + UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors); > + UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors); > + UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts); > + UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong); > + UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments); > + UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers); > + UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived); > + UPDATE_EXTEND_STAT(rx_stat_xoffstateentered); > + UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived); > + UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived); > + UPDATE_EXTEND_STAT(tx_stat_outxonsent); > + UPDATE_EXTEND_STAT(tx_stat_outxoffsent); > + UPDATE_EXTEND_STAT(tx_stat_flowcontroldone); > + UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions); > + UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes); > + UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes); > + UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions); > + UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions); > + UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions); > + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets); > + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets); > + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets); > + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets); > + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets); > + UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets); > + UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets); > + UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors); > + > + estats->pause_frames_received_hi =3D > + pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi; > + estats->pause_frames_received_lo =3D > + pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo; > + ADD_64(estats->pause_frames_received_hi, > + pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, > + estats->pause_frames_received_lo, > + pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); > + > + estats->pause_frames_sent_hi =3D > + pstats->mac_stx[1].tx_stat_outxonsent_hi; > + estats->pause_frames_sent_lo =3D > + pstats->mac_stx[1].tx_stat_outxonsent_lo; > + ADD_64(estats->pause_frames_sent_hi, > + pstats->mac_stx[1].tx_stat_outxoffsent_hi, > + estats->pause_frames_sent_lo, > + pstats->mac_stx[1].tx_stat_outxoffsent_lo); > } > > static int > bnx2x_hw_stats_update(struct bnx2x_softc *sc) > { > - struct nig_stats *new =3D BNX2X_SP(sc, nig_stats); > - struct nig_stats *old =3D &(sc->port.old_nig_stats); > - struct host_port_stats *pstats =3D BNX2X_SP(sc, port_stats); > - struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > - uint32_t lpi_reg, nig_timer_max; > - struct { > - uint32_t lo; > - uint32_t hi; > - } diff; > - > - switch (sc->link_vars.mac_type) { > - case ELINK_MAC_TYPE_BMAC: > - bnx2x_bmac_stats_update(sc); > - break; > - > - case ELINK_MAC_TYPE_EMAC: > - bnx2x_emac_stats_update(sc); > - break; > - > - case ELINK_MAC_TYPE_UMAC: > - case ELINK_MAC_TYPE_XMAC: > - bnx2x_mstat_stats_update(sc); > - break; > - > - case ELINK_MAC_TYPE_NONE: /* unreached */ > - PMD_DRV_LOG(DEBUG, sc, > - "stats updated by DMAE but no MAC active"); > - return -1; > - > - default: /* unreached */ > - PMD_DRV_LOG(ERR, sc, "stats update failed, unknown MAC type"); > - } > - > - ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo, > - new->brb_discard - old->brb_discard); > - ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo, > - new->brb_truncate - old->brb_truncate); > - > - if (!CHIP_IS_E3(sc)) { > - UPDATE_STAT64_NIG(egress_mac_pkt0, > - etherstatspkts1024octetsto1522octets); > - UPDATE_STAT64_NIG(egress_mac_pkt1, > - etherstatspktsover1522octets); > - } > + struct nig_stats *new =3D BNX2X_SP(sc, nig_stats); > + struct nig_stats *old =3D &sc->port.old_nig_stats; > + struct host_port_stats *pstats =3D BNX2X_SP(sc, port_stats); > + struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > + uint32_t lpi_reg, nig_timer_max; > + struct { > + uint32_t lo; > + uint32_t hi; > + } diff; > + > + switch (sc->link_vars.mac_type) { > + case ELINK_MAC_TYPE_BMAC: > + bnx2x_bmac_stats_update(sc); > + break; > + > + case ELINK_MAC_TYPE_EMAC: > + bnx2x_emac_stats_update(sc); > + break; > + > + case ELINK_MAC_TYPE_UMAC: > + case ELINK_MAC_TYPE_XMAC: > + bnx2x_mstat_stats_update(sc); > + break; > + > + case ELINK_MAC_TYPE_NONE: /* unreached */ > + PMD_DRV_LOG(DEBUG, sc, > + "stats updated by DMAE but no MAC active"); > + return -1; > + > + default: /* unreached */ > + PMD_DRV_LOG(ERR, sc, "stats update failed, unknown MAC ty= pe"); > + } > + > + ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo, > + new->brb_discard - old->brb_discard); > + ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo, > + new->brb_truncate - old->brb_truncate); > + > + if (!CHIP_IS_E3(sc)) { > + UPDATE_STAT64_NIG(egress_mac_pkt0, > + etherstatspkts1024octetsto1522octets); > + UPDATE_STAT64_NIG(egress_mac_pkt1, > + etherstatspktsover1522octets); > + } > > memcpy(old, new, sizeof(struct nig_stats)); > > memcpy(RTE_PTR_ADD(estats, offsetof(struct bnx2x_eth_stats, rx_st= at_ifhcinbadoctets_hi)), > - &pstats->mac_stx[1], sizeof(struct mac_stx)); > - estats->brb_drop_hi =3D pstats->brb_drop_hi; > - estats->brb_drop_lo =3D pstats->brb_drop_lo; > - > - pstats->host_port_stats_counter++; > - > - if (CHIP_IS_E3(sc)) { > - lpi_reg =3D (SC_PORT(sc)) ? > - MISC_REG_CPMU_LP_SM_ENT_CNT_P1 : > - MISC_REG_CPMU_LP_SM_ENT_CNT_P0; > - estats->eee_tx_lpi +=3D REG_RD(sc, lpi_reg); > - } > - > - if (!BNX2X_NOMCP(sc)) { > - nig_timer_max =3D SHMEM_RD(sc, port_mb[SC_PORT(sc)].stat_nig_time= r); > - if (nig_timer_max !=3D estats->nig_timer_max) { > - estats->nig_timer_max =3D nig_timer_max; > - PMD_DRV_LOG(ERR, sc, "invalid NIG timer max (%u)", > - estats->nig_timer_max); > + &pstats->mac_stx[1], sizeof(struct mac_stx)); > + estats->brb_drop_hi =3D pstats->brb_drop_hi; > + estats->brb_drop_lo =3D pstats->brb_drop_lo; > + > + pstats->host_port_stats_counter++; > + > + if (CHIP_IS_E3(sc)) { > + lpi_reg =3D (SC_PORT(sc)) ? > + MISC_REG_CPMU_LP_SM_ENT_CNT_P1 : > + MISC_REG_CPMU_LP_SM_ENT_CNT_P0; > + estats->eee_tx_lpi +=3D REG_RD(sc, lpi_reg); > } > - } > > - return 0; > + if (!BNX2X_NOMCP(sc)) { > + nig_timer_max =3D SHMEM_RD(sc, port_mb[SC_PORT(sc)].stat_= nig_timer); > + if (nig_timer_max !=3D estats->nig_timer_max) { > + estats->nig_timer_max =3D nig_timer_max; > + PMD_DRV_LOG(ERR, sc, "invalid NIG timer max (%u)"= , > + estats->nig_timer_max); > + } > + } > + > + return 0; > } > > static int > bnx2x_storm_stats_validate_counters(struct bnx2x_softc *sc) > { > - struct stats_counter *counters =3D &sc->fw_stats_data->storm_counter= s; > - uint16_t cur_stats_counter; > - > - /* > - * Make sure we use the value of the counter > - * used for sending the last stats ramrod. > - */ > - cur_stats_counter =3D (sc->stats_counter - 1); > - > - /* are storm stats valid? */ > - if (le16toh(counters->xstats_counter) !=3D cur_stats_counter) { > - PMD_DRV_LOG(DEBUG, sc, > - "stats not updated by xstorm, " > - "counter 0x%x !=3D stats_counter 0x%x", > - le16toh(counters->xstats_counter), sc->stats_counter); > - return -EAGAIN; > - } > - > - if (le16toh(counters->ustats_counter) !=3D cur_stats_counter) { > - PMD_DRV_LOG(DEBUG, sc, > - "stats not updated by ustorm, " > - "counter 0x%x !=3D stats_counter 0x%x", > - le16toh(counters->ustats_counter), sc->stats_counter); > - return -EAGAIN; > - } > - > - if (le16toh(counters->cstats_counter) !=3D cur_stats_counter) { > - PMD_DRV_LOG(DEBUG, sc, > - "stats not updated by cstorm, " > - "counter 0x%x !=3D stats_counter 0x%x", > - le16toh(counters->cstats_counter), sc->stats_counter); > - return -EAGAIN; > - } > - > - if (le16toh(counters->tstats_counter) !=3D cur_stats_counter) { > - PMD_DRV_LOG(DEBUG, sc, > - "stats not updated by tstorm, " > - "counter 0x%x !=3D stats_counter 0x%x", > - le16toh(counters->tstats_counter), sc->stats_counter); > - return -EAGAIN; > - } > - > - return 0; > + struct stats_counter *counters =3D &sc->fw_stats_data->storm_coun= ters; > + uint16_t cur_stats_counter; > + > + /* > + * Make sure we use the value of the counter > + * used for sending the last stats ramrod. > + */ > + cur_stats_counter =3D sc->stats_counter - 1; > + > + /* are storm stats valid? */ > + if (le16toh(counters->xstats_counter) !=3D cur_stats_counter) { > + PMD_DRV_LOG(DEBUG, sc, > + "stats not updated by xstorm, " > + "counter 0x%x !=3D stats_counter 0x%x", > + le16toh(counters->xstats_counter), sc->stats_= counter); > + return -EAGAIN; > + } > + > + if (le16toh(counters->ustats_counter) !=3D cur_stats_counter) { > + PMD_DRV_LOG(DEBUG, sc, > + "stats not updated by ustorm, " > + "counter 0x%x !=3D stats_counter 0x%x", > + le16toh(counters->ustats_counter), sc->stats_= counter); > + return -EAGAIN; > + } > + > + if (le16toh(counters->cstats_counter) !=3D cur_stats_counter) { > + PMD_DRV_LOG(DEBUG, sc, > + "stats not updated by cstorm, " > + "counter 0x%x !=3D stats_counter 0x%x", > + le16toh(counters->cstats_counter), sc->stats_= counter); > + return -EAGAIN; > + } > + > + if (le16toh(counters->tstats_counter) !=3D cur_stats_counter) { > + PMD_DRV_LOG(DEBUG, sc, > + "stats not updated by tstorm, " > + "counter 0x%x !=3D stats_counter 0x%x", > + le16toh(counters->tstats_counter), sc->stats_= counter); > + return -EAGAIN; > + } > + > + return 0; > } > > static int > @@ -906,9 +897,8 @@ bnx2x_storm_stats_update(struct bnx2x_softc *sc) > int i; > > /* vfs stat counter is managed by pf */ > - if (IS_PF(sc) && bnx2x_storm_stats_validate_counters(sc)) { > + if (IS_PF(sc) && bnx2x_storm_stats_validate_counters(sc)) > return -EAGAIN; > - } > > estats->error_bytes_received_hi =3D 0; > estats->error_bytes_received_lo =3D 0; > @@ -1074,61 +1064,60 @@ bnx2x_storm_stats_update(struct bnx2x_softc *sc) > static void > bnx2x_drv_stats_update(struct bnx2x_softc *sc) > { > - struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > - int i; > - > - for (i =3D 0; i < sc->num_queues; i++) { > - struct bnx2x_eth_q_stats *qstats =3D &sc->fp[i].eth_q_stats; > - struct bnx2x_eth_q_stats_old *qstats_old =3D &sc->fp[i].eth_q_sta= ts_old; > - > - UPDATE_ESTAT_QSTAT(rx_calls); > - UPDATE_ESTAT_QSTAT(rx_pkts); > - UPDATE_ESTAT_QSTAT(rx_soft_errors); > - UPDATE_ESTAT_QSTAT(rx_hw_csum_errors); > - UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_ip); > - UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_tcp_udp); > - UPDATE_ESTAT_QSTAT(rx_budget_reached); > - UPDATE_ESTAT_QSTAT(tx_pkts); > - UPDATE_ESTAT_QSTAT(tx_soft_errors); > - UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_ip); > - UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_tcp); > - UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_udp); > - UPDATE_ESTAT_QSTAT(tx_encap_failures); > - UPDATE_ESTAT_QSTAT(tx_hw_queue_full); > - UPDATE_ESTAT_QSTAT(tx_hw_max_queue_depth); > - UPDATE_ESTAT_QSTAT(tx_dma_mapping_failure); > - UPDATE_ESTAT_QSTAT(tx_max_drbr_queue_depth); > - UPDATE_ESTAT_QSTAT(tx_window_violation_std); > - UPDATE_ESTAT_QSTAT(tx_chain_lost_mbuf); > - UPDATE_ESTAT_QSTAT(tx_frames_deferred); > - UPDATE_ESTAT_QSTAT(tx_queue_xoff); > - > - /* mbuf driver statistics */ > - UPDATE_ESTAT_QSTAT(mbuf_defrag_attempts); > - UPDATE_ESTAT_QSTAT(mbuf_defrag_failures); > - UPDATE_ESTAT_QSTAT(mbuf_rx_bd_alloc_failed); > - UPDATE_ESTAT_QSTAT(mbuf_rx_bd_mapping_failed); > - > - /* track the number of allocated mbufs */ > - UPDATE_ESTAT_QSTAT(mbuf_alloc_tx); > - UPDATE_ESTAT_QSTAT(mbuf_alloc_rx); > - } > + struct bnx2x_eth_stats *estats =3D &sc->eth_stats; > + int i; > + > + for (i =3D 0; i < sc->num_queues; i++) { > + struct bnx2x_eth_q_stats *qstats =3D &sc->fp[i].eth_q_sta= ts; > + struct bnx2x_eth_q_stats_old *qstats_old =3D &sc->fp[i].e= th_q_stats_old; > + > + UPDATE_ESTAT_QSTAT(rx_calls); > + UPDATE_ESTAT_QSTAT(rx_pkts); > + UPDATE_ESTAT_QSTAT(rx_soft_errors); > + UPDATE_ESTAT_QSTAT(rx_hw_csum_errors); > + UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_ip); > + UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_tcp_udp); > + UPDATE_ESTAT_QSTAT(rx_budget_reached); > + UPDATE_ESTAT_QSTAT(tx_pkts); > + UPDATE_ESTAT_QSTAT(tx_soft_errors); > + UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_ip); > + UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_tcp); > + UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_udp); > + UPDATE_ESTAT_QSTAT(tx_encap_failures); > + UPDATE_ESTAT_QSTAT(tx_hw_queue_full); > + UPDATE_ESTAT_QSTAT(tx_hw_max_queue_depth); > + UPDATE_ESTAT_QSTAT(tx_dma_mapping_failure); > + UPDATE_ESTAT_QSTAT(tx_max_drbr_queue_depth); > + UPDATE_ESTAT_QSTAT(tx_window_violation_std); > + UPDATE_ESTAT_QSTAT(tx_chain_lost_mbuf); > + UPDATE_ESTAT_QSTAT(tx_frames_deferred); > + UPDATE_ESTAT_QSTAT(tx_queue_xoff); > + > + /* mbuf driver statistics */ > + UPDATE_ESTAT_QSTAT(mbuf_defrag_attempts); > + UPDATE_ESTAT_QSTAT(mbuf_defrag_failures); > + UPDATE_ESTAT_QSTAT(mbuf_rx_bd_alloc_failed); > + UPDATE_ESTAT_QSTAT(mbuf_rx_bd_mapping_failed); > + > + /* track the number of allocated mbufs */ > + UPDATE_ESTAT_QSTAT(mbuf_alloc_tx); > + UPDATE_ESTAT_QSTAT(mbuf_alloc_rx); > + } > } > > static uint8_t > bnx2x_edebug_stats_stopped(struct bnx2x_softc *sc) > { > - uint32_t val; > + uint32_t val; > > - if (SHMEM2_HAS(sc, edebug_driver_if[1])) { > - val =3D SHMEM2_RD(sc, edebug_driver_if[1]); > + if (SHMEM2_HAS(sc, edebug_driver_if[1])) { > + val =3D SHMEM2_RD(sc, edebug_driver_if[1]); > > - if (val =3D=3D EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) { > - return TRUE; > + if (val =3D=3D EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) > + return TRUE; > } > - } > > - return FALSE; > + return FALSE; > } > > static void > @@ -1136,9 +1125,8 @@ bnx2x_stats_update(struct bnx2x_softc *sc) > { > uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > > - if (bnx2x_edebug_stats_stopped(sc)) { > + if (bnx2x_edebug_stats_stopped(sc)) > return; > - } > > if (IS_PF(sc)) { > > @@ -1147,18 +1135,15 @@ bnx2x_stats_update(struct bnx2x_softc *sc) > bnx2x_storm_stats_post(sc); > DELAY_MS(5); > > - if (*stats_comp !=3D DMAE_COMP_VAL) { > + if (*stats_comp !=3D DMAE_COMP_VAL) > return; > - } > > - if (sc->port.pmf) { > + if (sc->port.pmf) > bnx2x_hw_stats_update(sc); > - } > > if (bnx2x_storm_stats_update(sc)) { > - if (sc->stats_pending++ =3D=3D 3) { > + if (sc->stats_pending++ =3D=3D 3) > rte_panic("storm stats not updated for 3 = times"); > - } > return; > } > } else { > @@ -1175,113 +1160,107 @@ bnx2x_stats_update(struct bnx2x_softc *sc) > static void > bnx2x_port_stats_stop(struct bnx2x_softc *sc) > { > - struct dmae_command *dmae; > - uint32_t opcode; > - int loader_idx =3D PMF_DMAE_C(sc); > - uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > + struct dmae_command *dmae; > + uint32_t opcode; > + int loader_idx =3D PMF_DMAE_C(sc); > + uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > > - sc->executer_idx =3D 0; > + sc->executer_idx =3D 0; > > - opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, FALSE, = 0); > + opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, FALS= E, 0); > > - if (sc->port.port_stx) { > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + if (sc->port.port_stx) { > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > > - if (sc->func_stx) { > - dmae->opcode =3D bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP= _GRC); > - } else { > - dmae->opcode =3D bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP= _PCI); > + if (sc->func_stx) > + dmae->opcode =3D bnx2x_dmae_opcode_add_comp(opcod= e, DMAE_COMP_GRC); > + else > + dmae->opcode =3D bnx2x_dmae_opcode_add_comp(opcod= e, DMAE_COMP_PCI); > + > + dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, port_st= ats)); > + dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, port_st= ats)); > + dmae->dst_addr_lo =3D sc->port.port_stx >> 2; > + dmae->dst_addr_hi =3D 0; > + dmae->len =3D bnx2x_get_port_stats_dma_len(sc); > + if (sc->func_stx) { > + dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx]= >> 2); > + dmae->comp_addr_hi =3D 0; > + dmae->comp_val =3D 1; > + } else { > + dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc= , stats_comp)); > + dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc= , stats_comp)); > + dmae->comp_val =3D DMAE_COMP_VAL; > + > + *stats_comp =3D 0; > + } > } > > - dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, port_stats)); > - dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, port_stats)); > - dmae->dst_addr_lo =3D sc->port.port_stx >> 2; > - dmae->dst_addr_hi =3D 0; > - dmae->len =3D bnx2x_get_port_stats_dma_len(sc); > if (sc->func_stx) { > - dmae->comp_addr_lo =3D (dmae_reg_go_c[loader_idx] >> 2); > - dmae->comp_addr_hi =3D 0; > - dmae->comp_val =3D 1; > - } else { > - dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_comp= )); > - dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_comp= )); > - dmae->comp_val =3D DMAE_COMP_VAL; > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D bnx2x_dmae_opcode_add_comp(opcode, DMAE_= COMP_PCI); > + dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, func_st= ats)); > + dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, func_st= ats)); > + dmae->dst_addr_lo =3D (sc->func_stx >> 2); > + dmae->dst_addr_hi =3D 0; > + dmae->len =3D (sizeof(struct host_func_stats) >> 2); > + dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_= comp)); > + dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_= comp)); > + dmae->comp_val =3D DMAE_COMP_VAL; > > - *stats_comp =3D 0; > + *stats_comp =3D 0; > } > - } > - > - if (sc->func_stx) { > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI= ); > - dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, func_stats)); > - dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, func_stats)); > - dmae->dst_addr_lo =3D (sc->func_stx >> 2); > - dmae->dst_addr_hi =3D 0; > - dmae->len =3D (sizeof(struct host_func_stats) >> 2); > - dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_comp)); > - dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_comp)); > - dmae->comp_val =3D DMAE_COMP_VAL; > - > - *stats_comp =3D 0; > - } > } > > static void > bnx2x_stats_stop(struct bnx2x_softc *sc) > { > - uint8_t update =3D FALSE; > + uint8_t update =3D FALSE; > > - bnx2x_stats_comp(sc); > + bnx2x_stats_comp(sc); > > - if (sc->port.pmf) { > - update =3D bnx2x_hw_stats_update(sc) =3D=3D 0; > - } > + if (sc->port.pmf) > + update =3D bnx2x_hw_stats_update(sc) =3D=3D 0; > > - update |=3D bnx2x_storm_stats_update(sc) =3D=3D 0; > + update |=3D bnx2x_storm_stats_update(sc) =3D=3D 0; > > - if (update) { > + if (update) { > + if (sc->port.pmf) > + bnx2x_port_stats_stop(sc); > > - if (sc->port.pmf) { > - bnx2x_port_stats_stop(sc); > + bnx2x_hw_stats_post(sc); > + bnx2x_stats_comp(sc); > } > - > - bnx2x_hw_stats_post(sc); > - bnx2x_stats_comp(sc); > - } > } > > static void > bnx2x_stats_do_nothing(__rte_unused struct bnx2x_softc *sc) > { > - return; > } > > static const struct { > - void (*action)(struct bnx2x_softc *sc); > - enum bnx2x_stats_state next_state; > + void (*action)(struct bnx2x_softc *sc); > + enum bnx2x_stats_state next_state; > } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] =3D { > - { > - /* DISABLED PMF */ { bnx2x_stats_pmf_update, STATS_STATE_DISABLED }, > - /* LINK_UP */ { bnx2x_stats_start, STATS_STATE_ENABLED }, > - /* UPDATE */ { bnx2x_stats_do_nothing, STATS_STATE_DISABLED }, > - /* STOP */ { bnx2x_stats_do_nothing, STATS_STATE_DISABLED } > - }, > - { > - /* ENABLED PMF */ { bnx2x_stats_pmf_start, STATS_STATE_ENABLED }, > - /* LINK_UP */ { bnx2x_stats_restart, STATS_STATE_ENABLED }, > - /* UPDATE */ { bnx2x_stats_update, STATS_STATE_ENABLED }, > - /* STOP */ { bnx2x_stats_stop, STATS_STATE_DISABLED } > - } > + { > + /* DISABLED PMF */ { bnx2x_stats_pmf_update, STATS_STATE_DISABLED= }, > + /* LINK_UP */ { bnx2x_stats_start, STATS_STATE_ENABLED = }, > + /* UPDATE */ { bnx2x_stats_do_nothing, STATS_STATE_DISABLED= }, > + /* STOP */ { bnx2x_stats_do_nothing, STATS_STATE_DISABLED= } > + }, > + { > + /* ENABLED PMF */ { bnx2x_stats_pmf_start, STATS_STATE_ENABLED = }, > + /* LINK_UP */ { bnx2x_stats_restart, STATS_STATE_ENABLED = }, > + /* UPDATE */ { bnx2x_stats_update, STATS_STATE_ENABLED = }, > + /* STOP */ { bnx2x_stats_stop, STATS_STATE_DISABLED= } > + } > }; > > void bnx2x_stats_handle(struct bnx2x_softc *sc, enum bnx2x_stats_event e= vent) > { > enum bnx2x_stats_state state; > > - if (unlikely(sc->panic)) { > + if (unlikely(sc->panic)) > return; > - } > > state =3D sc->stats_state; > sc->stats_state =3D bnx2x_stats_stm[state][event].next_state; > @@ -1298,32 +1277,32 @@ void bnx2x_stats_handle(struct bnx2x_softc *sc, e= num bnx2x_stats_event event) > static void > bnx2x_port_stats_base_init(struct bnx2x_softc *sc) > { > - struct dmae_command *dmae; > - uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > - > - /* sanity */ > - if (!sc->port.pmf || !sc->port.port_stx) { > - PMD_DRV_LOG(ERR, sc, "BUG!"); > - return; > - } > - > - sc->executer_idx =3D 0; > - > - dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > - dmae->opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, > - TRUE, DMAE_COMP_PCI); > - dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, port_stats)); > - dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, port_stats)); > - dmae->dst_addr_lo =3D (sc->port.port_stx >> 2); > - dmae->dst_addr_hi =3D 0; > - dmae->len =3D bnx2x_get_port_stats_dma_len(sc); > - dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_comp)); > - dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_comp)); > - dmae->comp_val =3D DMAE_COMP_VAL; > - > - *stats_comp =3D 0; > - bnx2x_hw_stats_post(sc); > - bnx2x_stats_comp(sc); > + struct dmae_command *dmae; > + uint32_t *stats_comp =3D BNX2X_SP(sc, stats_comp); > + > + /* sanity */ > + if (!sc->port.pmf || !sc->port.port_stx) { > + PMD_DRV_LOG(ERR, sc, "BUG!"); > + return; > + } > + > + sc->executer_idx =3D 0; > + > + dmae =3D BNX2X_SP(sc, dmae[sc->executer_idx++]); > + dmae->opcode =3D bnx2x_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC= , > + TRUE, DMAE_COMP_PCI); > + dmae->src_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, port_stats)); > + dmae->src_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, port_stats)); > + dmae->dst_addr_lo =3D (sc->port.port_stx >> 2); > + dmae->dst_addr_hi =3D 0; > + dmae->len =3D bnx2x_get_port_stats_dma_len(sc); > + dmae->comp_addr_lo =3D U64_LO(BNX2X_SP_MAPPING(sc, stats_comp)); > + dmae->comp_addr_hi =3D U64_HI(BNX2X_SP_MAPPING(sc, stats_comp)); > + dmae->comp_val =3D DMAE_COMP_VAL; > + > + *stats_comp =3D 0; > + bnx2x_hw_stats_post(sc); > + bnx2x_stats_comp(sc); > } > > /* > @@ -1334,84 +1313,84 @@ bnx2x_port_stats_base_init(struct bnx2x_softc *sc= ) > static void > bnx2x_prep_fw_stats_req(struct bnx2x_softc *sc) > { > - int i; > - int first_queue_query_index; > - struct stats_query_header *stats_hdr =3D &sc->fw_stats_req->hdr; > - rte_iova_t cur_data_offset; > - struct stats_query_entry *cur_query_entry; > - > - stats_hdr->cmd_num =3D sc->fw_stats_num; > - stats_hdr->drv_stats_counter =3D 0; > - > - /* > - * The storm_counters struct contains the counters of completed > - * statistics requests per storm which are incremented by FW > - * each time it completes hadning a statistics ramrod. We will > - * check these counters in the timer handler and discard a > - * (statistics) ramrod completion. > - */ > - cur_data_offset =3D (sc->fw_stats_data_mapping + > - offsetof(struct bnx2x_fw_stats_data, storm_counter= s)); > - > - stats_hdr->stats_counters_addrs.hi =3D htole32(U64_HI(cur_data_offse= t)); > - stats_hdr->stats_counters_addrs.lo =3D htole32(U64_LO(cur_data_offse= t)); > - > - /* > - * Prepare the first stats ramrod (will be completed with > - * the counters equal to zero) - init counters to something differen= t. > - */ > - memset(&sc->fw_stats_data->storm_counters, 0xff, > - sizeof(struct stats_counter)); > - > - /**** Port FW statistics data ****/ > - cur_data_offset =3D (sc->fw_stats_data_mapping + > - offsetof(struct bnx2x_fw_stats_data, port)); > - > - cur_query_entry =3D &sc->fw_stats_req->query[BNX2X_PORT_QUERY_IDX]; > - > - cur_query_entry->kind =3D STATS_TYPE_PORT; > - /* For port query index is a DON'T CARE */ > - cur_query_entry->index =3D SC_PORT(sc); > - /* For port query funcID is a DON'T CARE */ > - cur_query_entry->funcID =3D htole16(SC_FUNC(sc)); > - cur_query_entry->address.hi =3D htole32(U64_HI(cur_data_offset)); > - cur_query_entry->address.lo =3D htole32(U64_LO(cur_data_offset)); > - > - /**** PF FW statistics data ****/ > - cur_data_offset =3D (sc->fw_stats_data_mapping + > - offsetof(struct bnx2x_fw_stats_data, pf)); > - > - cur_query_entry =3D &sc->fw_stats_req->query[BNX2X_PF_QUERY_IDX]; > - > - cur_query_entry->kind =3D STATS_TYPE_PF; > - /* For PF query index is a DON'T CARE */ > - cur_query_entry->index =3D SC_PORT(sc); > - cur_query_entry->funcID =3D htole16(SC_FUNC(sc)); > - cur_query_entry->address.hi =3D htole32(U64_HI(cur_data_offset)); > - cur_query_entry->address.lo =3D htole32(U64_LO(cur_data_offset)); > - > - /**** Clients' queries ****/ > - cur_data_offset =3D (sc->fw_stats_data_mapping + > - offsetof(struct bnx2x_fw_stats_data, queue_stats))= ; > - > - /* > - * First queue query index depends whether FCoE offloaded request wi= ll > - * be included in the ramrod > - */ > - first_queue_query_index =3D (BNX2X_FIRST_QUEUE_QUERY_IDX - 1); > + int i; > + int first_queue_query_index; > + struct stats_query_header *stats_hdr =3D &sc->fw_stats_req->hdr; > + rte_iova_t cur_data_offset; > + struct stats_query_entry *cur_query_entry; > + > + stats_hdr->cmd_num =3D sc->fw_stats_num; > + stats_hdr->drv_stats_counter =3D 0; > + > + /* > + * The storm_counters struct contains the counters of completed > + * statistics requests per storm which are incremented by FW > + * each time it completes hadning a statistics ramrod. We will > + * check these counters in the timer handler and discard a > + * (statistics) ramrod completion. > + */ > + cur_data_offset =3D (sc->fw_stats_data_mapping + > + offsetof(struct bnx2x_fw_stats_data, storm_cou= nters)); > + > + stats_hdr->stats_counters_addrs.hi =3D htole32(U64_HI(cur_data_of= fset)); > + stats_hdr->stats_counters_addrs.lo =3D htole32(U64_LO(cur_data_of= fset)); > + > + /* > + * Prepare the first stats ramrod (will be completed with > + * the counters equal to zero) - init counters to something diffe= rent. > + */ > + memset(&sc->fw_stats_data->storm_counters, 0xff, > + sizeof(struct stats_counter)); > > - for (i =3D 0; i < sc->num_queues; i++) { > - cur_query_entry =3D > - &sc->fw_stats_req->query[first_queue_query_index + i]; > + /**** Port FW statistics data ****/ > + cur_data_offset =3D (sc->fw_stats_data_mapping + > + offsetof(struct bnx2x_fw_stats_data, port)); > > - cur_query_entry->kind =3D STATS_TYPE_QUEUE; > - cur_query_entry->index =3D bnx2x_stats_id(&sc->fp[i]); > + cur_query_entry =3D &sc->fw_stats_req->query[BNX2X_PORT_QUERY_IDX= ]; > + > + cur_query_entry->kind =3D STATS_TYPE_PORT; > + /* For port query index is a DON'T CARE */ > + cur_query_entry->index =3D SC_PORT(sc); > + /* For port query funcID is a DON'T CARE */ > + cur_query_entry->funcID =3D htole16(SC_FUNC(sc)); > + cur_query_entry->address.hi =3D htole32(U64_HI(cur_data_offset)); > + cur_query_entry->address.lo =3D htole32(U64_LO(cur_data_offset)); > + > + /**** PF FW statistics data ****/ > + cur_data_offset =3D (sc->fw_stats_data_mapping + > + offsetof(struct bnx2x_fw_stats_data, pf)); > + > + cur_query_entry =3D &sc->fw_stats_req->query[BNX2X_PF_QUERY_IDX]; > + > + cur_query_entry->kind =3D STATS_TYPE_PF; > + /* For PF query index is a DON'T CARE */ > + cur_query_entry->index =3D SC_PORT(sc); > cur_query_entry->funcID =3D htole16(SC_FUNC(sc)); > cur_query_entry->address.hi =3D htole32(U64_HI(cur_data_offset)); > cur_query_entry->address.lo =3D htole32(U64_LO(cur_data_offset)); > > - cur_data_offset +=3D sizeof(struct per_queue_stats); > - } > + /**** Clients' queries ****/ > + cur_data_offset =3D (sc->fw_stats_data_mapping + > + offsetof(struct bnx2x_fw_stats_data, queue_sta= ts)); > + > + /* > + * First queue query index depends whether FCoE offloaded request= will > + * be included in the ramrod > + */ > + first_queue_query_index =3D (BNX2X_FIRST_QUEUE_QUERY_IDX - 1); > + > + for (i =3D 0; i < sc->num_queues; i++) { > + cur_query_entry =3D > + &sc->fw_stats_req->query[first_queue_query_index = + i]; > + > + cur_query_entry->kind =3D STATS_TYPE_QUEUE; > + cur_query_entry->index =3D bnx2x_stats_id(&sc->fp[i]); > + cur_query_entry->funcID =3D htole16(SC_FUNC(sc)); > + cur_query_entry->address.hi =3D htole32(U64_HI(cur_data_o= ffset)); > + cur_query_entry->address.lo =3D htole32(U64_LO(cur_data_o= ffset)); > + > + cur_data_offset +=3D sizeof(struct per_queue_stats); > + } > } > > void bnx2x_memset_stats(struct bnx2x_softc *sc) > @@ -1479,9 +1458,8 @@ bnx2x_stats_init(struct bnx2x_softc *sc) > sc->port.port_stx, sc->func_stx); > > /* pmf should retrieve port statistics from SP on a non-init*/ > - if (!sc->stats_init && sc->port.pmf && sc->port.port_stx) { > + if (!sc->stats_init && sc->port.pmf && sc->port.port_stx) > bnx2x_stats_handle(sc, STATS_EVENT_PMF); > - } > > port =3D SC_PORT(sc); > /* port stats */ > @@ -1533,9 +1511,8 @@ bnx2x_stats_init(struct bnx2x_softc *sc) > > sc->stats_state =3D STATS_STATE_DISABLED; > > - if (sc->port.pmf && sc->port.port_stx) { > + if (sc->port.pmf && sc->port.port_stx) > bnx2x_port_stats_base_init(sc); > - } > > /* mark the end of statistics initialization */ > sc->stats_init =3D FALSE; > -- > 2.43.0 >