From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7CCE54300B; Tue, 8 Aug 2023 12:29:11 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0AE8B43247; Tue, 8 Aug 2023 12:29:11 +0200 (CEST) Received: from mail-vk1-f171.google.com (mail-vk1-f171.google.com [209.85.221.171]) by mails.dpdk.org (Postfix) with ESMTP id 87ACC40A87 for ; Tue, 8 Aug 2023 12:29:10 +0200 (CEST) Received: by mail-vk1-f171.google.com with SMTP id 71dfb90a1353d-48726442294so1113254e0c.0 for ; Tue, 08 Aug 2023 03:29:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691490550; x=1692095350; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=xsasV21am0UuMKWIMRXqGEvazDTm2gO0VHsStDDBw9E=; b=dfiPOF/K4N0Mx45olU2zXFT+ywgAXIZ/0GulCgaLB0U52KFyafmjwZukV2m1e21CKQ iozLUjREdIb2Q0E0p7RMg9crLTpoJnqiLz67Dg3rhLEcKtUam05FMKFWZ1l2j07BowIC 1/8LNYwS9CJPnWS/2TmGC0zStguhHt3UmGPA+JaLny4+J2ctzBQZSAYQP0j/ZEGszwHl CYRD1BES0OeTZq7sV6D/LmyJowUIe+yYeup2X5SLeKuL+F2WJCexdebVm1pAV3gnLyEu p8YDyBtS1Kh5je+IoHuMgztEKQc9MbfYTjLcQwBe4tpEAkwHjAItioXUSGTtsL+Me8We a/xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691490550; x=1692095350; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xsasV21am0UuMKWIMRXqGEvazDTm2gO0VHsStDDBw9E=; b=gDoacnJwn0UREC6AW6aWqtyDDsd4F5dZcUs0kV2+1uMR86SdX8D9EWfKIutwIDUcY9 47ZgdAoluN8ts9XT421KA3cVJGXdylKYzpIgh1pr4tCKCd6ehIUteCI30HobOV/JNXco wlX0FR+QDj0P/3xVFWZKM78HhJaLKZMtD/9E9AvN4Qrr34vIITUebv/zKwFwI1uLBSK8 gEoaMYu6ksAdALtp/lMuCsFzpUtaP7AzjfQORNZm4hmBGexq6+dn6nxyhZOwMnD9HNzp q04Oa1THSRyL2y3O8Z/59i9eDTRw3nx9qeIXkDCFquRgmg0Bn6rgVbno88HkSndR+ldq f6zQ== X-Gm-Message-State: AOJu0Ywb3+gg6eQsFkvFlleI1rcaGgFWK6T54LrmpEKt+wAxc7L8tUUq P45kjMDuXuQSAIb+44Pl5ONj9O9/MGeec1l0qMU= X-Google-Smtp-Source: AGHT+IEg0ShkJiZYUolqM0THywdoCpkVvZkIabXtr9s+HiDMXEBLoHGzVo1cv2kZ3V/DC4uZnGcTResAHGaRM6qmkNk= X-Received: by 2002:a1f:4310:0:b0:487:17e3:8fb with SMTP id q16-20020a1f4310000000b0048717e308fbmr6210348vka.11.1691490549787; Tue, 08 Aug 2023 03:29:09 -0700 (PDT) MIME-Version: 1.0 References: <20230516144824.6732-1-pbhagavatula@marvell.com> In-Reply-To: <20230516144824.6732-1-pbhagavatula@marvell.com> From: Jerin Jacob Date: Tue, 8 Aug 2023 15:58:43 +0530 Message-ID: Subject: Re: [PATCH] event/cnxk: add get remaining ticks routine To: pbhagavatula@marvell.com Cc: jerinj@marvell.com, Shijith Thotton , dev@dpdk.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Tue, May 16, 2023 at 8:18=E2=80=AFPM wrote: > > From: Pavan Nikhilesh > > Add support to get the remaining ticks to expire for a > given event timer. > > Signed-off-by: Pavan Nikhilesh Please resend this as CI is failing. On next version, Please update doc/guides/rel_notes/release_23_11.rst as * **Updated Marvell cnxk eventdev driver.** * Oneline for new feature. > --- > drivers/event/cnxk/cn10k_worker.h | 6 +++++ > drivers/event/cnxk/cn9k_worker.h | 4 ++++ > drivers/event/cnxk/cnxk_tim_evdev.c | 1 + > drivers/event/cnxk/cnxk_tim_evdev.h | 3 +++ > drivers/event/cnxk/cnxk_tim_worker.c | 35 ++++++++++++++++++++++++++++ > 5 files changed, 49 insertions(+) > > diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k= _worker.h > index 06c71c6092..3907919135 100644 > --- a/drivers/event/cnxk/cn10k_worker.h > +++ b/drivers/event/cnxk/cn10k_worker.h > @@ -5,7 +5,9 @@ > #ifndef __CN10K_WORKER_H__ > #define __CN10K_WORKER_H__ > > +#include > #include > + > #include "cn10k_cryptodev_event_dp.h" > #include "cn10k_rx.h" > #include "cnxk_worker.h" > @@ -213,6 +215,10 @@ cn10k_sso_hws_post_process(struct cn10k_sso_hws *ws,= uint64_t *u64, > /* Mark vector mempool object as get */ > RTE_MEMPOOL_CHECK_COOKIES(rte_mempool_from_obj((void *)u6= 4[1]), > (void **)&u64[1], 1, 1); > + } else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) =3D=3D RTE_EVENT_TYPE= _TIMER) { > + struct rte_event_timer *tim =3D (void *)u64[1]; > + > + tim->state =3D RTE_EVENT_TIMER_NOT_ARMED; > } > } > > diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_w= orker.h > index 1ce4b044e8..04be35de8a 100644 > --- a/drivers/event/cnxk/cn9k_worker.h > +++ b/drivers/event/cnxk/cn9k_worker.h > @@ -215,6 +215,10 @@ cn9k_sso_hws_post_process(uint64_t *u64, uint64_t mb= uf, const uint32_t flags, > if (flags & NIX_RX_OFFLOAD_TSTAMP_F) > cn9k_sso_process_tstamp(u64[1], mbuf, tstamp[port= ]); > u64[1] =3D mbuf; > + } else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) =3D=3D RTE_EVENT_TYPE= _TIMER) { > + struct rte_event_timer *tim =3D (void *)u64[1]; > + > + tim->state =3D RTE_EVENT_TIMER_NOT_ARMED; > } > } > > diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnx= k_tim_evdev.c > index 121480df15..6d59fdf909 100644 > --- a/drivers/event/cnxk/cnxk_tim_evdev.c > +++ b/drivers/event/cnxk/cnxk_tim_evdev.c > @@ -392,6 +392,7 @@ cnxk_tim_caps_get(const struct rte_eventdev *evdev, u= int64_t flags, > cnxk_tim_ops.start =3D cnxk_tim_ring_start; > cnxk_tim_ops.stop =3D cnxk_tim_ring_stop; > cnxk_tim_ops.get_info =3D cnxk_tim_ring_info_get; > + cnxk_tim_ops.remaining_ticks_get =3D cnxk_tim_remaining_ticks_get= ; > sso_set_priv_mem_fn =3D priv_mem_fn; > > if (dev->enable_stats) { > diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnx= k_tim_evdev.h > index 3a0b036cb4..b91fcb3aca 100644 > --- a/drivers/event/cnxk/cnxk_tim_evdev.h > +++ b/drivers/event/cnxk/cnxk_tim_evdev.h > @@ -320,6 +320,9 @@ cnxk_tim_timer_cancel_burst(const struct rte_event_ti= mer_adapter *adptr, > struct rte_event_timer **tim, > const uint16_t nb_timers); > > +int cnxk_tim_remaining_ticks_get(const struct rte_event_timer_adapter *a= dapter, > + const struct rte_event_timer *evtim, uin= t64_t *ticks_remaining); > + > int cnxk_tim_caps_get(const struct rte_eventdev *dev, uint64_t flags, > uint32_t *caps, > const struct event_timer_adapter_ops **ops, > diff --git a/drivers/event/cnxk/cnxk_tim_worker.c b/drivers/event/cnxk/cn= xk_tim_worker.c > index 923a72093b..d1dab0552f 100644 > --- a/drivers/event/cnxk/cnxk_tim_worker.c > +++ b/drivers/event/cnxk/cnxk_tim_worker.c > @@ -171,3 +171,38 @@ cnxk_tim_timer_cancel_burst(const struct rte_event_t= imer_adapter *adptr, > > return index; > } > + > +int > +cnxk_tim_remaining_ticks_get(const struct rte_event_timer_adapter *adapt= er, > + const struct rte_event_timer *evtim, uint64_= t *ticks_remaining) > +{ > + struct cnxk_tim_ring *tim_ring =3D adapter->data->adapter_priv; > + struct cnxk_tim_bkt *bkt, *current_bkt; > + struct cnxk_tim_ent *entry; > + uint64_t bkt_cyc, bucket; > + uint64_t sema; > + > + if (evtim->impl_opaque[1] =3D=3D 0 || evtim->impl_opaque[0] =3D= =3D 0) > + return -ENOENT; > + > + entry =3D (struct cnxk_tim_ent *)(uintptr_t)evtim->impl_opaque[0]= ; > + if (entry->wqe !=3D evtim->ev.u64) > + return -ENOENT; > + > + if (evtim->state !=3D RTE_EVENT_TIMER_ARMED) > + return -ENOENT; > + > + bkt =3D (struct cnxk_tim_bkt *)evtim->impl_opaque[1]; > + sema =3D __atomic_load_n(&bkt->w1, __ATOMIC_ACQUIRE); > + if (cnxk_tim_bkt_get_hbt(sema) || !cnxk_tim_bkt_get_nent(sema)) > + return -ENOENT; > + > + bkt_cyc =3D tim_ring->tick_fn(tim_ring->tbase) - tim_ring->ring_s= tart_cyc; > + bucket =3D rte_reciprocal_divide_u64(bkt_cyc, &tim_ring->fast_div= ); > + current_bkt =3D &tim_ring->bkt[bucket]; > + > + *ticks_remaining =3D RTE_MAX(bkt, current_bkt) - RTE_MIN(bkt, cur= rent_bkt); > + /* Assume that the current bucket is yet to expire */ > + *ticks_remaining +=3D 1; > + return 0; > +} > -- > 2.25.1 >