From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7DD00A058A; Wed, 25 Mar 2020 07:52:00 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 013682BAE; Wed, 25 Mar 2020 07:51:59 +0100 (CET) Received: from mail-il1-f196.google.com (mail-il1-f196.google.com [209.85.166.196]) by dpdk.org (Postfix) with ESMTP id 5F0F92C15 for ; Wed, 25 Mar 2020 07:51:57 +0100 (CET) Received: by mail-il1-f196.google.com with SMTP id p13so885968ilp.3 for ; Tue, 24 Mar 2020 23:51:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=MIxChio7m4C8nNGCMJc6h0hfhJ6irzUSNdDvbX7SMFE=; b=bhmBkWsVGpe1r+qTQgiUc01vHowM8xlAdPfjE3CNpL9jycBraBR2OYeqkiplhl6epZ 7Vq4NnC9C8kjrFiuXtBCj/ezgHz7bgVs0cB22YN/jBX4LRaIpL9Pnce+T13K4jobz8rH 8Q8yjcArzuMStp+B5OFhnj2PiMYOQsvXbpQPVEDCzpEnPqIuzcf0mpgJephU7HS1ZkL6 xFi4VO4ZJ56On1KgBT/QxU0exmZDzPyNPD1m7XU1vFOn/6PelZl6sY1MWLkCH1Vf39UB 3ik/XSKQMlXbPXcpwE5gthUls89wvbY3UnhkmCH1xvvH2+FWhwupPTZD+dSV69xJitU6 dyyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=MIxChio7m4C8nNGCMJc6h0hfhJ6irzUSNdDvbX7SMFE=; b=DNdfWxotu1zND7HebJMBI6OUROUALJ6nU04uuHk5Ppw2pV2HbQSBxyMmqfv0Xd1YRK NSLtkMlqVtzFOwEkTpfxfUzdCe4+ej1tHOs1jvLMylbJgBDkD6aCBYz7HJOKaAUdUl2o iayVcMDKS/eVeY7bgwj5xWvT6AnwXkEsy969uZdQWNsDULUVC+8SjSifiePA+DlUGsLh z5DoR+GOipXRymnaMzhyAeqmBJ91/N5SxQgeArpj5hPoQX4G8oCuMZb/WwGII+LGocCJ RkkcWd7/DPkvsUoAm5rpdqXEZ0Ni+bSAApdQ0MIhWr94Y3cCWwTR0k4qQGRrnvRGJMB7 EZdQ== X-Gm-Message-State: ANhLgQ3S5JpXjdCfxTcJFODm3XTp5xKvcv9d2YGtbKJdqcie6LIWVImh /0sWRmpDgl+DO9gclslB70lFNb/HhDIc95VjEqY= X-Google-Smtp-Source: ADFU+vvsbKxEQkR8lqmrvQoJ6Lh1+9WKzm7U9w60iSQn7fV1jOHYAypv5B40MP5t/Vsj4GJArawrJZ/aiI1DRjc1LA0= X-Received: by 2002:a92:48cb:: with SMTP id j72mr2127384ilg.162.1585119116522; Tue, 24 Mar 2020 23:51:56 -0700 (PDT) MIME-Version: 1.0 References: <20200306163524.1650-1-pbhagavatula@marvell.com> <20200324165342.2055-1-pbhagavatula@marvell.com> In-Reply-To: <20200324165342.2055-1-pbhagavatula@marvell.com> From: Jerin Jacob Date: Wed, 25 Mar 2020 12:21:40 +0530 Message-ID: To: Pavan Nikhilesh Cc: Jerin Jacob , Andrzej Ostruszka , John McNamara , Marko Kovacevic , Nithin Dabilpuram , Vamsi Attunuru , Kiran Kumar K , dpdk-dev Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [dpdk-dev v2] [PATCH 1/2] mempool/octeontx2: add devargs to lock ctx in cache X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Mar 24, 2020 at 10:23 PM wrote: > > From: Pavan Nikhilesh > > Add device arguments to lock NPA aura and pool contexts in NDC cache. > The device args take hexadecimal bitmask where each bit represent the > corresponding aura/pool id. > Example: > -w 0002:02:00.0,npa_lock_mask=0xf // Lock first 4 aura/pool ctx > > Signed-off-by: Pavan Nikhilesh Please split this series as two as 1/2 needs to go through master and 2/2 needs to go through next-net-mrvl.