From: Jerin Jacob <jerinjacobk@gmail.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Ferruh Yigit <ferruh.yigit@intel.com>
Cc: Jerin Jacob <jerinj@marvell.com>,
Vamsi Attunuru <vattunuru@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>, dpdk-dev <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] common/octeotx2: add support for C0 silicon version
Date: Tue, 14 Jan 2020 13:32:49 +0530 [thread overview]
Message-ID: <CALBAE1MZYW7+yG6+xk8pEt3Gxu5j-xukh-C0MPm4ugk3viD0xQ@mail.gmail.com> (raw)
In-Reply-To: <20200113050303.3511-1-ndabilpuram@marvell.com>
On Mon, Jan 13, 2020 at 10:33 AM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> Avoid using PCI subsystem device id for SoC revision
> identification and just use PCI revision id to support C0 silicon.
> This patch also reduces SQB threshold to 70% to have
> sufficient buffer before we overflow SQ.
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Fixed the typo in subject s/octeotx2/octeontx2/
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/master. Thanks
> ---
> drivers/common/octeontx2/otx2_common.h | 3 ---
> drivers/common/octeontx2/otx2_dev.h | 6 +-----
> drivers/net/octeontx2/otx2_ethdev.h | 2 +-
> 3 files changed, 2 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h
> index f62c45d..c64d373 100644
> --- a/drivers/common/octeontx2/otx2_common.h
> +++ b/drivers/common/octeontx2/otx2_common.h
> @@ -124,9 +124,6 @@ extern int otx2_logtype_dpi;
> #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF 0xA0f6
> #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF 0xA0f7
>
> -/* Subsystem Device ID */
> -#define PCI_SUBSYS_DEVID_96XX_95XX 0xB200
> -
> /*
> * REVID for RVU PCIe devices.
> * Bits 0..1: minor pass
> diff --git a/drivers/common/octeontx2/otx2_dev.h b/drivers/common/octeontx2/otx2_dev.h
> index 7d9839c..0b0a949 100644
> --- a/drivers/common/octeontx2/otx2_dev.h
> +++ b/drivers/common/octeontx2/otx2_dev.h
> @@ -103,11 +103,7 @@ otx2_dev_init(struct rte_pci_device *pci_dev, void *otx2_dev)
> return rc;
> }
>
> - if (pci_dev->id.subsystem_device_id == PCI_SUBSYS_DEVID_96XX_95XX)
> - dev->hwcap = rev_id;
> - else
> - dev->hwcap = 0;
> -
> + dev->hwcap = rev_id;
> return otx2_dev_priv_init(pci_dev, otx2_dev);
> }
>
> diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
> index 987e760..7f1d0f0 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.h
> +++ b/drivers/net/octeontx2/otx2_ethdev.h
> @@ -79,7 +79,7 @@
> #define NIX_RX_NB_SEG_MAX 6
> #define NIX_CQ_ENTRY_SZ 128
> #define NIX_CQ_ALIGN 512
> -#define NIX_SQB_LOWER_THRESH 90
> +#define NIX_SQB_LOWER_THRESH 70
> #define LMT_SLOT_MASK 0x7f
> #define NIX_RX_DEFAULT_RING_SZ 4096
>
> --
> 2.8.4
>
prev parent reply other threads:[~2020-01-14 8:03 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-13 5:03 Nithin Dabilpuram
2020-01-14 8:02 ` Jerin Jacob [this message]
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