* [dpdk-dev] [PATCH] common/octeotx2: add support for C0 silicon version
@ 2020-01-13 5:03 Nithin Dabilpuram
2020-01-14 8:02 ` Jerin Jacob
0 siblings, 1 reply; 2+ messages in thread
From: Nithin Dabilpuram @ 2020-01-13 5:03 UTC (permalink / raw)
To: Jerin Jacob, Nithin Dabilpuram, Vamsi Attunuru, Kiran Kumar K; +Cc: dev
Avoid using PCI subsystem device id for SoC revision
identification and just use PCI revision id to support C0 silicon.
This patch also reduces SQB threshold to 70% to have
sufficient buffer before we overflow SQ.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/octeontx2/otx2_common.h | 3 ---
drivers/common/octeontx2/otx2_dev.h | 6 +-----
drivers/net/octeontx2/otx2_ethdev.h | 2 +-
3 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h
index f62c45d..c64d373 100644
--- a/drivers/common/octeontx2/otx2_common.h
+++ b/drivers/common/octeontx2/otx2_common.h
@@ -124,9 +124,6 @@ extern int otx2_logtype_dpi;
#define PCI_DEVID_OCTEONTX2_RVU_SDP_PF 0xA0f6
#define PCI_DEVID_OCTEONTX2_RVU_SDP_VF 0xA0f7
-/* Subsystem Device ID */
-#define PCI_SUBSYS_DEVID_96XX_95XX 0xB200
-
/*
* REVID for RVU PCIe devices.
* Bits 0..1: minor pass
diff --git a/drivers/common/octeontx2/otx2_dev.h b/drivers/common/octeontx2/otx2_dev.h
index 7d9839c..0b0a949 100644
--- a/drivers/common/octeontx2/otx2_dev.h
+++ b/drivers/common/octeontx2/otx2_dev.h
@@ -103,11 +103,7 @@ otx2_dev_init(struct rte_pci_device *pci_dev, void *otx2_dev)
return rc;
}
- if (pci_dev->id.subsystem_device_id == PCI_SUBSYS_DEVID_96XX_95XX)
- dev->hwcap = rev_id;
- else
- dev->hwcap = 0;
-
+ dev->hwcap = rev_id;
return otx2_dev_priv_init(pci_dev, otx2_dev);
}
diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index 987e760..7f1d0f0 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -79,7 +79,7 @@
#define NIX_RX_NB_SEG_MAX 6
#define NIX_CQ_ENTRY_SZ 128
#define NIX_CQ_ALIGN 512
-#define NIX_SQB_LOWER_THRESH 90
+#define NIX_SQB_LOWER_THRESH 70
#define LMT_SLOT_MASK 0x7f
#define NIX_RX_DEFAULT_RING_SZ 4096
--
2.8.4
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [dpdk-dev] [PATCH] common/octeotx2: add support for C0 silicon version
2020-01-13 5:03 [dpdk-dev] [PATCH] common/octeotx2: add support for C0 silicon version Nithin Dabilpuram
@ 2020-01-14 8:02 ` Jerin Jacob
0 siblings, 0 replies; 2+ messages in thread
From: Jerin Jacob @ 2020-01-14 8:02 UTC (permalink / raw)
To: Nithin Dabilpuram, Ferruh Yigit
Cc: Jerin Jacob, Vamsi Attunuru, Kiran Kumar K, dpdk-dev
On Mon, Jan 13, 2020 at 10:33 AM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> Avoid using PCI subsystem device id for SoC revision
> identification and just use PCI revision id to support C0 silicon.
> This patch also reduces SQB threshold to 70% to have
> sufficient buffer before we overflow SQ.
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Fixed the typo in subject s/octeotx2/octeontx2/
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/master. Thanks
> ---
> drivers/common/octeontx2/otx2_common.h | 3 ---
> drivers/common/octeontx2/otx2_dev.h | 6 +-----
> drivers/net/octeontx2/otx2_ethdev.h | 2 +-
> 3 files changed, 2 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h
> index f62c45d..c64d373 100644
> --- a/drivers/common/octeontx2/otx2_common.h
> +++ b/drivers/common/octeontx2/otx2_common.h
> @@ -124,9 +124,6 @@ extern int otx2_logtype_dpi;
> #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF 0xA0f6
> #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF 0xA0f7
>
> -/* Subsystem Device ID */
> -#define PCI_SUBSYS_DEVID_96XX_95XX 0xB200
> -
> /*
> * REVID for RVU PCIe devices.
> * Bits 0..1: minor pass
> diff --git a/drivers/common/octeontx2/otx2_dev.h b/drivers/common/octeontx2/otx2_dev.h
> index 7d9839c..0b0a949 100644
> --- a/drivers/common/octeontx2/otx2_dev.h
> +++ b/drivers/common/octeontx2/otx2_dev.h
> @@ -103,11 +103,7 @@ otx2_dev_init(struct rte_pci_device *pci_dev, void *otx2_dev)
> return rc;
> }
>
> - if (pci_dev->id.subsystem_device_id == PCI_SUBSYS_DEVID_96XX_95XX)
> - dev->hwcap = rev_id;
> - else
> - dev->hwcap = 0;
> -
> + dev->hwcap = rev_id;
> return otx2_dev_priv_init(pci_dev, otx2_dev);
> }
>
> diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
> index 987e760..7f1d0f0 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.h
> +++ b/drivers/net/octeontx2/otx2_ethdev.h
> @@ -79,7 +79,7 @@
> #define NIX_RX_NB_SEG_MAX 6
> #define NIX_CQ_ENTRY_SZ 128
> #define NIX_CQ_ALIGN 512
> -#define NIX_SQB_LOWER_THRESH 90
> +#define NIX_SQB_LOWER_THRESH 70
> #define LMT_SLOT_MASK 0x7f
> #define NIX_RX_DEFAULT_RING_SZ 4096
>
> --
> 2.8.4
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2020-01-14 8:02 ` Jerin Jacob
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