From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7A65EA0C4C; Tue, 21 Sep 2021 11:12:50 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3F25D4003E; Tue, 21 Sep 2021 11:12:50 +0200 (CEST) Received: from mail-il1-f178.google.com (mail-il1-f178.google.com [209.85.166.178]) by mails.dpdk.org (Postfix) with ESMTP id 195F94003C for ; Tue, 21 Sep 2021 11:12:49 +0200 (CEST) Received: by mail-il1-f178.google.com with SMTP id q14so21873147ils.5 for ; Tue, 21 Sep 2021 02:12:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=kNWQEQL8mfKJPEQbmwp2QwEuFdVCY8R0U0s0bN74Tuc=; b=prcH6qFn0//KlYyNxF2KQ63UySIJNyNxG7GPfbxOKgP3y577ePTm4G3KjEizavbOkC IZuqcDaqfOi7zAQbuppyiifdAHpOFCnTTLurJzHEQBm0XPuU6mI23742AcJpL8Nq0swj eWdmBcda39NemB3wmzR0vK/2/Cfne+aE3cUhinKmez5WCfdxFNorHoAv34CtlvsRr2N2 Jz/vMfYOEhS7iXKA1uio1DGadSAWWxyVZjkMA+wjtWj16Wk0kEdfhFqdUsHeKemLNUJc 7pvpO44NXNJYPUV26x9igdl8GmSueN7ndkU9Nibn0Rj/dh51VpH2YzbVVRmu4n7/70wS 3/yQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=kNWQEQL8mfKJPEQbmwp2QwEuFdVCY8R0U0s0bN74Tuc=; b=I0Lfd2MXpDKE2HOksySuR4M2uW9uxTp6eYVnwP22FR9eVjN3Iq4SN2wff6S8asJspm j5y/S6NVYLSzJ3Q5MzCxaI/12saMkay2PigHUgZLDDTZhUPgENyTh5pxiKo4+vhkK5gH ZMBsVD6sKoZ7xNyOsAkJU1qwqA7ePxyiiOnTR+VvA8fqSzRN5g/mux6kyH0lkOsaMEKh wCVrvTAbCEJcjFVW3b53m8m2fi77ZvBezMbuNGmiFdbWNyCphxrlRBu23PK0iXkqiHO+ MUqkEGEmjglYJNvV+BG77B82RLBI9GLeds92RKq556X3N3yMMX0JxkxT3lgHRbAnEcxa H5tA== X-Gm-Message-State: AOAM5303HHsxSowG4xuiU97uPjbEY7VY7GECFRBiXNO71RklWlBMPMwX q1ELl4CjOCbz5fr+0+lBKj0iimqZ9ND5pPI+YAg= X-Google-Smtp-Source: ABdhPJxDa7dlBRWxfU4te+fLs3B6IF+hPMzW/O93Ay71WOQAg3xjwUba2JiOxdE3EbTChhg9iZKp497aGLwmFNOOINE= X-Received: by 2002:a92:c548:: with SMTP id a8mr13333963ilj.295.1632215568417; Tue, 21 Sep 2021 02:12:48 -0700 (PDT) MIME-Version: 1.0 References: <20210830135231.2610152-1-asekhar@marvell.com> <20210917112309.270554-1-asekhar@marvell.com> In-Reply-To: <20210917112309.270554-1-asekhar@marvell.com> From: Jerin Jacob Date: Tue, 21 Sep 2021 14:42:22 +0530 Message-ID: To: Ashwin Sekhar T K , Ferruh Yigit Cc: dpdk-dev , Jerin Jacob , Sunil Kumar Kori , Satha Koteswara Rao Kottidi , Pavan Nikhilesh , Kiran Kumar K , Satheesh Paul , Anoob Joseph , Akhil Goyal Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v2] common/cnxk: align NPA stack to ROC cache line size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Sep 17, 2021 at 4:55 PM Ashwin Sekhar T K wrote: > > Network Pool accelerator (NPA) is part of ROC (Rest Of Chip). So > NPA structures should be aligned to ROC Cache line size and not > CPU cache line size. > > Non alignment of NPA stack to ROC cache line will result in > undefined runtime NPA behaviour. > > Fixes: f765f5611240 ("common/cnxk: add NPA pool HW operations") > > Signed-off-by: Ashwin Sekhar T K > Acked-by: Jerin Jacob Applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > drivers/common/cnxk/roc_npa.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c > index d064d125c1..a0d2cc8f19 100644 > --- a/drivers/common/cnxk/roc_npa.c > +++ b/drivers/common/cnxk/roc_npa.c > @@ -194,7 +194,7 @@ npa_stack_dma_alloc(struct npa_lf *lf, char *name, int pool_id, size_t size) > { > const char *mz_name = npa_stack_memzone_name(lf, pool_id, name); > > - return plt_memzone_reserve_cache_align(mz_name, size); > + return plt_memzone_reserve_aligned(mz_name, size, 0, ROC_ALIGN); > } > > static inline int > -- > 2.32.0 >