From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3382BA034F; Sun, 28 Mar 2021 11:06:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A871740042; Sun, 28 Mar 2021 11:06:55 +0200 (CEST) Received: from mail-il1-f179.google.com (mail-il1-f179.google.com [209.85.166.179]) by mails.dpdk.org (Postfix) with ESMTP id C07E740040 for ; Sun, 28 Mar 2021 11:06:53 +0200 (CEST) Received: by mail-il1-f179.google.com with SMTP id d10so8765130ils.5 for ; Sun, 28 Mar 2021 02:06:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=g/+6JPMcbXMIadg/08HWEuOR485EnWZzc2+R4dz8C+w=; b=tmOgAl2ldGPjLsGyV7UvGv2xhgGUiODOcbdgHVraCIWOs6yEMjOJa3SilDK5MlWFxn SjRSYWKCRC5jsCQ0jvg8Nf0o4vHh8HNnA3u8GNAjDJ3Io3XPHzxPP3bxj4Hu9CkA4Jp0 aTSs6UKvWN8/7iuXfK18nVNXl7JLfXmEU1bXScDqdrvAyGvU4oncVmFXy67R2aEJrzi/ W24I1EzVRfGVeJ5TgKlLakTlhYoy0Hg1aLckjvt3RrZrWti2rbhBCfhUVP/Euvgypb04 jGo49hNNASAWQqj5s5DYUcoUOi/0iYZAs9Ofb2diuAM3QWbZ/BRUgCZOIU3YPcQbosBq obZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=g/+6JPMcbXMIadg/08HWEuOR485EnWZzc2+R4dz8C+w=; b=adUKtUnFpgaTnQNiws5Kafdn1g6kwWEGtyvuKHZUq1CUevT9h/j3xYyVPRRk5ocR5s wM6jtsh3KkGS4/p+LEdZUMmTn7JbLHv31kkId2jX+DcuB1z5a0SrLoPOutRsX5qsmHyg 8QC/Flb/cboRofY7P/vDc+LkQRnzuMPgd+kKZS7yohkcevXzHSS114S7JM4rtGO8HOnZ xmFBr4awxcIZdGeX6VXfIH3JOeJP0zC+B3DlTiZFGZVZvquvcCp6gJ6yWpLRHUWityTH V1U6z8SXcQjXgFdAE4QAZr8Mc3bCbU6O57K4jUsnDujt0TwqFMjF6MNQaz8QQqJK/I+T ufow== X-Gm-Message-State: AOAM530/Br3DUq6otwS7j0VvXfQXkZeQz22Df9fLyz4NyV6c1YT8U7be R6mqvP5wuMDKAOJD0su9LGZ5ToDuCaaz4lMLs8I= X-Google-Smtp-Source: ABdhPJxcTEVORvwtHCMmQdHQWpOBZT8KJDnsdS5D4lE5arLLxZkPvg0+WnIekjppyd1kD1V9Ar8z9StEPfIskYuky5M= X-Received: by 2002:a05:6e02:1087:: with SMTP id r7mr4910134ilj.162.1616922412932; Sun, 28 Mar 2021 02:06:52 -0700 (PDT) MIME-Version: 1.0 References: <20210305162149.2196166-1-asekhar@marvell.com> <20210305162149.2196166-7-asekhar@marvell.com> In-Reply-To: <20210305162149.2196166-7-asekhar@marvell.com> From: Jerin Jacob Date: Sun, 28 Mar 2021 14:36:36 +0530 Message-ID: To: Ashwin Sekhar T K Cc: dpdk-dev , Jerin Jacob , Sunil Kumar Kori , Satha Koteswara Rao Kottidi , Pavan Nikhilesh , Kiran Kumar K , Satheesh Paul , Nithin Dabilpuram Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH 6/6] doc: add Marvell CNXK mempool documentation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Mar 5, 2021 at 11:44 PM Ashwin Sekhar T K wrote: > > Add Marvell OCTEON CNXK mempool documentation. > > Signed-off-by: Jerin Jacob > Signed-off-by: Nithin Dabilpuram > Signed-off-by: Ashwin Sekhar T K > --- > MAINTAINERS | 6 +++ > doc/guides/mempool/cnxk.rst | 84 ++++++++++++++++++++++++++++++++++++ > doc/guides/mempool/index.rst | 1 + > doc/guides/platform/cnxk.rst | 3 ++ > 4 files changed, 94 insertions(+) > create mode 100644 doc/guides/mempool/cnxk.rst > > diff --git a/MAINTAINERS b/MAINTAINERS > index 45dcd36dbe..67c179f11b 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -501,6 +501,12 @@ M: Artem V. Andreev > M: Andrew Rybchenko > F: drivers/mempool/bucket/ > > +Marvell cnxk > +M: Ashwin Sekhar T K > +M: Pavan Nikhilesh > +F: drivers/mempool/cnxk/ > +F: doc/guides/mempool/cnxk.rst Please move this section to the first patch. > + > Marvell OCTEON TX2 > M: Jerin Jacob > M: Nithin Dabilpuram > diff --git a/doc/guides/mempool/cnxk.rst b/doc/guides/mempool/cnxk.rst > new file mode 100644 > index 0000000000..fe099bb11a > --- /dev/null > +++ b/doc/guides/mempool/cnxk.rst > @@ -0,0 +1,84 @@ > +.. SPDX-License-Identifier: BSD-3-Clause > + Copyright(C) 2021 Marvell. > + > +CNXK NPA Mempool Driver > +============================ > + > +The CNXK NPA PMD (**librte_mempool_cnxk**) provides mempool > +driver support for the integrated mempool device found in **Marvell OCTEON CN9K/CN10K** SoC family. > + > +More information about CNXK SoC can be found at `Marvell Official Website > +`_. > + > +Features > +-------- > + > +CNXK NPA PMD supports: > + > +- Up to 128 NPA LFs > +- 1M Pools per LF > +- HW mempool manager > +- Asynchronous batch alloc of up to 512 buffer allocations with single instruction. > +- Batch free of up to 15 buffers with single instruction. > +- Ethdev Rx buffer allocation in HW to save CPU cycles in the Rx path. > +- Ethdev Tx buffer recycling in HW to save CPU cycles in the Tx path. Please move this section first patch. > + > +Prerequisites and Compilation procedure > +--------------------------------------- > + > + See :doc:`../platform/cnxk` for setup information. > + > +Pre-Installation Configuration > +------------------------------ > + > + > +Runtime Config Options > +~~~~~~~~~~~~~~~~~~~~~~ > + > +- ``Maximum number of mempools per application`` (default ``128``) > + > + The maximum number of mempools per application needs to be configured on > + HW during mempool driver initialization. HW can support up to 1M mempools, > + Since each mempool costs set of HW resources, the ``max_pools`` ``devargs`` > + parameter is being introduced to configure the number of mempools required > + for the application. > + For example:: > + > + -a 0002:02:00.0,max_pools=512 Please add this section on the patch where it adds devargs. > + > + With the above configuration, the driver will set up only 512 mempools for > + the given application to save HW resources. > + > +.. note:: > + > + Since this configuration is per application, the end user needs to > + provide ``max_pools`` parameter to the first PCIe device probed by the given > + application. > + > +Debugging Options > +~~~~~~~~~~~~~~~~~ > + > +.. _table_cnxk_mempool_debug_options: > + > +.. table:: CNXK mempool debug options > + > + +---+------------+-------------------------------------------------------+ > + | # | Component | EAL log command | > + +===+============+=======================================================+ > + | 1 | NPA | --log-level='pmd\.mempool.cnxk,8' | > + +---+------------+-------------------------------------------------------+ > + > +Standalone mempool device > +~~~~~~~~~~~~~~~~~~~~~~~~~ > + > + The ``usertools/dpdk-devbind.py`` script shall enumerate all the mempool devices > + available in the system. In order to avoid, the end user to bind the mempool > + device prior to use ethdev and/or eventdev device, the respective driver > + configures an NPA LF and attach to the first probed ethdev or eventdev device. > + In case, if end user need to run mempool as a standalone device > + (without ethdev or eventdev), end user needs to bind a mempool device using > + ``usertools/dpdk-devbind.py`` > + > + Example command to run ``mempool_autotest`` test with standalone CN10K NPA device:: > + > + echo "mempool_autotest" | /app/test/dpdk-test -c 0xf0 --mbuf-pool-ops-name="cn10k_mempool_ops" > diff --git a/doc/guides/mempool/index.rst b/doc/guides/mempool/index.rst > index a0e55467e6..ce53bc1ac7 100644 > --- a/doc/guides/mempool/index.rst > +++ b/doc/guides/mempool/index.rst > @@ -11,6 +11,7 @@ application through the mempool API. > :maxdepth: 2 > :numbered: > > + cnxk > octeontx > octeontx2 > ring > diff --git a/doc/guides/platform/cnxk.rst b/doc/guides/platform/cnxk.rst > index 3b072877a1..9bbba65f2e 100644 > --- a/doc/guides/platform/cnxk.rst > +++ b/doc/guides/platform/cnxk.rst > @@ -141,6 +141,9 @@ HW Offload Drivers > > This section lists dataplane H/W block(s) available in CNXK SoC. > > +#. **Mempool Driver** > + See :doc:`../mempool/cnxk` for NPA mempool driver information. > + > Procedure to Setup Platform > --------------------------- > > -- > 2.29.2 >